diff --git a/Golang-ppc64x-asm-Reference.md b/Golang-ppc64x-asm-Reference.md
index 8ac6459..0684c61 100644
--- a/Golang-ppc64x-asm-Reference.md
+++ b/Golang-ppc64x-asm-Reference.md
@@ -72,6 +72,24 @@
 	VMRGOW   TMP2, TMP1, out_low; \
 	VMRGEW   TMP2, TMP1, out_hi
 ```
+
+## 向量数据加载
+### 填充
+- **VSPLTISB** "Vector Splat Immediate Signed Byte". This instruction is used to fill a vector register with a specified 8-bit signed integer.填充立即数到目标向量寄存器。
+- **VSPLTB** "Vector Splat Byte". This instruction is used to replicate a specified byte across all elements of a vector register.从源向量寄存器中取指定位置的字节，填充到目标向量寄存器。
+
+### 从内存加载(Load)数据
+- **LXVDSX** "Load Vector Doubleword Scalar Indexed". This instruction is used to load a doubleword (64-bit element) from memory into a vector register.从指定内存位置加载64位数据，将其存储到目标向量寄存器的lower half（byte index from 0-7）。
+- **LVXD2X** "Load Vector Doubleword 2 Indexed". This instruction is used to load two consecutive doublewords (64-bit elements) from memory into a vector register. 加载两个连续的64位数到目标向量寄存器。
+
+### 存储数据到内存
+- **STXVD2X** "Store Vector Doubleword 2 Indexed". This instruction is used to store two consecutive doublewords (64-bit elements) from a vector register into memory.
+
+## 其它
+- **VCMPEQUD** "Vector Compare Equal Unsigned Doubleword". This instruction is used to compare the corresponding doublewords (64-bit elements) in two vector registers for equality.
+
+
+
 # 典型的ppc64及ppc64le
 
 The typical CPUs for ppc64 (PowerPC 64-bit Big Endian) and ppc64le (PowerPC 64-bit Little Endian) are IBM's POWER series of processors.