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https://github.com/emmansun/gmsm.git
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330 lines
10 KiB
ArmAsm
330 lines
10 KiB
ArmAsm
// Copyright 2024 Sun Yimin. All rights reserved.
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// Use of this source code is governed by a MIT-style
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// license that can be found in the LICENSE file.
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//go:build !purego
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#include "textflag.h"
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#include "go_asm.h"
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DATA mask<>+0x00(SB)/8, $0x0001020310111213
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DATA mask<>+0x08(SB)/8, $0x0405060714151617
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DATA mask<>+0x10(SB)/8, $0x08090a0b18191a1b
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DATA mask<>+0x18(SB)/8, $0x0c0d0e0f1c1d1e1f
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DATA mask<>+0x20(SB)/8, $0x0001020304050607
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DATA mask<>+0x28(SB)/8, $0x1011121314151617
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DATA mask<>+0x30(SB)/8, $0x08090a0b0c0d0e0f
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DATA mask<>+0x38(SB)/8, $0x18191a1b1c1d1e1f
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GLOBL mask<>(SB), 8, $64
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#define a V0
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#define e V1
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#define b V2
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#define f V3
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#define c V4
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#define g V5
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#define d V6
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#define h V7
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#define M0 V8
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#define M1 V9
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#define M2 V10
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#define M3 V11
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#define TMP0 V12
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#define TMP1 V13
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#define TMP2 V14
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#define TMP3 V15
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#define TMP4 V16
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#define aSave V24
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#define bSave V25
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#define cSave V26
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#define dSave V27
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#define eSave V28
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#define fSave V29
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#define gSave V30
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#define hSave V31
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#define TRANSPOSE_MATRIX(T0, T1, T2, T3, M0, M1, M2, M3, TMP0, TMP1, TMP2, TMP3) \
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VPERM T0, T1, M0, TMP0; \
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VPERM T2, T3, M0, TMP1; \
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VPERM T0, T1, M1, TMP2; \
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VPERM T2, T3, M1, TMP3; \
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VPERM TMP0, TMP1, M2, T0; \
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VPERM TMP0, TMP1, M3, T1; \
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VPERM TMP2, TMP3, M2, T2; \
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VPERM TMP2, TMP3, M3, T3
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// r = s <<< n
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#define PROLD(s, r, n) \
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VERLLF $n, s, r
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#define loadWordByIndex(W, i) \
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VL (16*(i))(statePtr), W
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// one word is 16 bytes
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#define prepare4Words \
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VL (srcPtr1)(srcPtrPtr*1), V16; \
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VL (srcPtr2)(srcPtrPtr*1), V17; \
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VL (srcPtr3)(srcPtrPtr*1), V18; \
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VL (srcPtr4)(srcPtrPtr*1), V19; \
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TRANSPOSE_MATRIX(V16, V17, V18, V19, M0, M1, M2, M3, TMP0, TMP1, TMP2, TMP3); \
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VSTM V16, V19, (wordPtr); \
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LAY 16(srcPtrPtr), srcPtrPtr; \
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ADD $64, wordPtr
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#define ROUND_00_11(index, a, b, c, d, e, f, g, h) \
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PROLD(a, TMP0, 12) \
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VLR TMP0, TMP1 \
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VLREPF (index*4)(kPtr), TMP2 \ // It seems that the VREPIF instruction is not supported yet.
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VAF TMP2, TMP0, TMP0 \
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VAF e, TMP0, TMP0 \
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PROLD(TMP0, TMP2, 7) \ // TMP2 = SS1
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VX TMP2, TMP1, TMP0 \ // TMP0 = SS2
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VX a, b, TMP1 \
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VX c, TMP1, TMP1 \
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VAF TMP1, d, TMP1 \ // TMP1 = (a XOR b XOR c) + d
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loadWordByIndex(TMP3, index) \
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loadWordByIndex(TMP4, index+4) \
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VX TMP3, TMP4, TMP4 \
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VAF TMP4, TMP1, TMP1 \ // TMP1 = (a XOR b XOR c) + d + (Wt XOR Wt+4)
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VAF TMP1, TMP0, TMP1 \ // TMP1 = TT1
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VAF h, TMP3, TMP3 \
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VAF TMP3, TMP2, TMP3 \ // Wt + h + SS1
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VX e, f, TMP4 \
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VX g, TMP4, TMP4 \
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VAF TMP4, TMP3, TMP3 \ // TT2 = (e XOR f XOR g) + Wt + h + SS1
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VLR b, TMP4 \
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PROLD(TMP4, b, 9) \ // b = b <<< 9
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VLR TMP1, h \ // h = TT1
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VLR f, TMP4 \
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PROLD(TMP4, f, 19) \ // f = f <<< 19
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PROLD(TMP3, TMP4, 9) \ // TMP4 = TT2 <<< 9
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PROLD(TMP4, TMP0, 8) \ // TMP0 = TT2 <<< 17
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VX TMP3, TMP4, TMP4 \ // TMP4 = TT2 XOR (TT2 <<< 9)
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VX TMP4, TMP0, d \ // d = TT2 XOR (TT2 <<< 9) XOR (TT2 <<< 17)
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#define MESSAGE_SCHEDULE(index) \
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loadWordByIndex(TMP0, index+1) \ // Wj-3
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PROLD(TMP0, TMP1, 15) \
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loadWordByIndex(TMP0, index-12) \ // Wj-16
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VX TMP0, TMP1, TMP0 \
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loadWordByIndex(TMP1, index-5) \ // Wj-9
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VX TMP0, TMP1, TMP0 \
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PROLD(TMP0, TMP1, 15) \
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PROLD(TMP1, TMP2, 8) \
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VX TMP1, TMP0, TMP0 \
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VX TMP2, TMP0, TMP0 \ // P1
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loadWordByIndex(TMP1, index-9) \ // Wj-13
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PROLD(TMP1, TMP2, 7) \
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VX TMP2, TMP0, TMP0 \
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loadWordByIndex(TMP1, index-2) \ // Wj-6
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VX TMP1, TMP0, TMP1 \
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VST TMP1, (wordPtr) \
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ADD $16, wordPtr \
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#define ROUND_12_15(index, a, b, c, d, e, f, g, h) \
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MESSAGE_SCHEDULE(index) \
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ROUND_00_11(index, a, b, c, d, e, f, g, h) \
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#define ROUND_16_63(index, a, b, c, d, e, f, g, h) \
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MESSAGE_SCHEDULE(index) \ // TMP1 is Wt+4 now, Pls do not use it
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PROLD(a, TMP0, 12) \
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VLR TMP0, TMP4 \
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VLREPF (index*4)(kPtr), TMP2 \ // It seems that the VREPIF instruction is not supported yet.
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VAF TMP2, TMP0, TMP0 \
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VAF e, TMP0, TMP0 \
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PROLD(TMP0, TMP2, 7) \ // TMP2 = SS1
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VX TMP2, TMP4, TMP0 \ // TMP0 = SS2
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VO a, b, TMP3 \
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VN a, b, TMP4 \
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VN c, TMP3, TMP3 \
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VO TMP4, TMP3, TMP4 \ // (a AND b) OR (a AND c) OR (b AND c)
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VAF TMP4, d, TMP4 \ // (a AND b) OR (a AND c) OR (b AND c) + d
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loadWordByIndex(TMP3, index) \ // Wj
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VX TMP3, TMP1, TMP1 \ // Wj XOR Wj+4
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VAF TMP4, TMP1, TMP4 \ // (a AND b) OR (a AND c) OR (b AND c) + d + (Wt XOR Wt+4)
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VAF TMP4, TMP0, TMP4 \ // TT1
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VAF h, TMP3, TMP3 \ // Wt + h
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VAF TMP2, TMP3, TMP3 \ // Wt + h + SS1
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VX f, g, TMP1 \
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VN TMP1, e, TMP1 \
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VX g, TMP1, TMP1 \ // (f XOR g) AND e XOR g
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VAF TMP3, TMP1, TMP3 \ // TT2
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VLR b, TMP1 \
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PROLD(TMP1, b, 9) \ // b = b <<< 9
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VLR TMP4, h \ // h = TT1
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VLR f, TMP1 \
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PROLD(TMP1, f, 19) \ // f = f <<< 19
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PROLD(TMP3, TMP1, 9) \ // TMP1 = TT2 <<< 9
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PROLD(TMP1, TMP0, 8) \ // TMP0 = TT2 <<< 17
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VX TMP3, TMP1, TMP1 \ // TMP1 = TT2 XOR (TT2 <<< 9)
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VX TMP1, TMP0, d \ // d = TT2 XOR (TT2 <<< 9) XOR (TT2 <<< 17)
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// func copyResultsBy4(dig *uint32, dst *byte)
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TEXT ·copyResultsBy4(SB),NOSPLIT,$0
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#define digPtr R3
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#define dstPtr R4
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MOVD dig+0(FP), digPtr
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MOVD dst+8(FP), dstPtr
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VLM (digPtr), V0, V7
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VSTM V0, V7, (dstPtr)
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RET
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#undef digPtr
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#undef dstPtr
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// Used general purpose registers R1-R11.
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// blockMultBy4(dig **[8]uint32, p **byte, buffer *byte, blocks int)
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TEXT ·blockMultBy4(SB), NOSPLIT, $0
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#define digPtr R11
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#define srcPtrPtr R1
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#define statePtr R2
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#define kPtr R3
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#define blockCount R5
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#define srcPtr1 R6
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#define srcPtr2 R7
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#define srcPtr3 R8
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#define srcPtr4 R9
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#define wordPtr R10
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MOVD dig+0(FP), digPtr
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MOVD p+8(FP), srcPtrPtr
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MOVD buffer+16(FP), statePtr
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MOVD blocks+24(FP), blockCount
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// load state
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MOVD 0(digPtr), R4
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VLM (R4), a, e
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MOVD 8(digPtr), R4
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VLM (R4), b, f
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MOVD 16(digPtr), R4
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VLM (R4), c, g
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MOVD 24(digPtr), R4
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VLM (R4), d, h
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MOVD $mask<>+0x00(SB), R4
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VLM (R4), M0, M3
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TRANSPOSE_MATRIX(a, b, c, d, M0, M1, M2, M3, TMP0, TMP1, TMP2, TMP3)
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TRANSPOSE_MATRIX(e, f, g, h, M0, M1, M2, M3, TMP0, TMP1, TMP2, TMP3)
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MOVD (srcPtrPtr), srcPtr1
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MOVD 8(srcPtrPtr), srcPtr2
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MOVD 16(srcPtrPtr), srcPtr3
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MOVD 24(srcPtrPtr), srcPtr4
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MOVD $0, srcPtrPtr
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MOVD $·_K+0(SB), kPtr
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loop:
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// save state
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VLR a, aSave
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VLR b, bSave
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VLR c, cSave
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VLR d, dSave
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VLR e, eSave
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VLR f, fSave
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VLR g, gSave
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VLR h, hSave
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// reset wordPtr
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MOVD statePtr, wordPtr
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// load message block
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prepare4Words
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prepare4Words
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prepare4Words
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prepare4Words
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ROUND_00_11(0, a, b, c, d, e, f, g, h)
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ROUND_00_11(1, h, a, b, c, d, e, f, g)
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ROUND_00_11(2, g, h, a, b, c, d, e, f)
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ROUND_00_11(3, f, g, h, a, b, c, d, e)
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ROUND_00_11(4, e, f, g, h, a, b, c, d)
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ROUND_00_11(5, d, e, f, g, h, a, b, c)
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ROUND_00_11(6, c, d, e, f, g, h, a, b)
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ROUND_00_11(7, b, c, d, e, f, g, h, a)
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ROUND_00_11(8, a, b, c, d, e, f, g, h)
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ROUND_00_11(9, h, a, b, c, d, e, f, g)
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ROUND_00_11(10, g, h, a, b, c, d, e, f)
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ROUND_00_11(11, f, g, h, a, b, c, d, e)
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ROUND_12_15(12, e, f, g, h, a, b, c, d)
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ROUND_12_15(13, d, e, f, g, h, a, b, c)
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ROUND_12_15(14, c, d, e, f, g, h, a, b)
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ROUND_12_15(15, b, c, d, e, f, g, h, a)
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ROUND_16_63(16, a, b, c, d, e, f, g, h)
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ROUND_16_63(17, h, a, b, c, d, e, f, g)
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ROUND_16_63(18, g, h, a, b, c, d, e, f)
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ROUND_16_63(19, f, g, h, a, b, c, d, e)
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ROUND_16_63(20, e, f, g, h, a, b, c, d)
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ROUND_16_63(21, d, e, f, g, h, a, b, c)
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ROUND_16_63(22, c, d, e, f, g, h, a, b)
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ROUND_16_63(23, b, c, d, e, f, g, h, a)
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ROUND_16_63(24, a, b, c, d, e, f, g, h)
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ROUND_16_63(25, h, a, b, c, d, e, f, g)
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ROUND_16_63(26, g, h, a, b, c, d, e, f)
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ROUND_16_63(27, f, g, h, a, b, c, d, e)
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ROUND_16_63(28, e, f, g, h, a, b, c, d)
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ROUND_16_63(29, d, e, f, g, h, a, b, c)
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ROUND_16_63(30, c, d, e, f, g, h, a, b)
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ROUND_16_63(31, b, c, d, e, f, g, h, a)
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ROUND_16_63(32, a, b, c, d, e, f, g, h)
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ROUND_16_63(33, h, a, b, c, d, e, f, g)
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ROUND_16_63(34, g, h, a, b, c, d, e, f)
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ROUND_16_63(35, f, g, h, a, b, c, d, e)
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ROUND_16_63(36, e, f, g, h, a, b, c, d)
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ROUND_16_63(37, d, e, f, g, h, a, b, c)
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ROUND_16_63(38, c, d, e, f, g, h, a, b)
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ROUND_16_63(39, b, c, d, e, f, g, h, a)
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ROUND_16_63(40, a, b, c, d, e, f, g, h)
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ROUND_16_63(41, h, a, b, c, d, e, f, g)
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ROUND_16_63(42, g, h, a, b, c, d, e, f)
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ROUND_16_63(43, f, g, h, a, b, c, d, e)
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ROUND_16_63(44, e, f, g, h, a, b, c, d)
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ROUND_16_63(45, d, e, f, g, h, a, b, c)
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ROUND_16_63(46, c, d, e, f, g, h, a, b)
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ROUND_16_63(47, b, c, d, e, f, g, h, a)
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ROUND_16_63(48, a, b, c, d, e, f, g, h)
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ROUND_16_63(49, h, a, b, c, d, e, f, g)
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ROUND_16_63(50, g, h, a, b, c, d, e, f)
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ROUND_16_63(51, f, g, h, a, b, c, d, e)
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ROUND_16_63(52, e, f, g, h, a, b, c, d)
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ROUND_16_63(53, d, e, f, g, h, a, b, c)
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ROUND_16_63(54, c, d, e, f, g, h, a, b)
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ROUND_16_63(55, b, c, d, e, f, g, h, a)
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ROUND_16_63(56, a, b, c, d, e, f, g, h)
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ROUND_16_63(57, h, a, b, c, d, e, f, g)
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ROUND_16_63(58, g, h, a, b, c, d, e, f)
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ROUND_16_63(59, f, g, h, a, b, c, d, e)
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ROUND_16_63(60, e, f, g, h, a, b, c, d)
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ROUND_16_63(61, d, e, f, g, h, a, b, c)
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ROUND_16_63(62, c, d, e, f, g, h, a, b)
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ROUND_16_63(63, b, c, d, e, f, g, h, a)
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VX a, aSave, a
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VX b, bSave, b
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VX c, cSave, c
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VX d, dSave, d
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VX e, eSave, e
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VX f, fSave, f
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VX g, gSave, g
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VX h, hSave, h
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SUB $1, blockCount
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CMPBGT blockCount, $0, loop
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TRANSPOSE_MATRIX(a, b, c, d, M0, M1, M2, M3, TMP0, TMP1, TMP2, TMP3)
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TRANSPOSE_MATRIX(e, f, g, h, M0, M1, M2, M3, TMP0, TMP1, TMP2, TMP3)
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MOVD 0(digPtr), R4
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VSTM a, e, (R4)
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MOVD 8(digPtr), R4
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VSTM b, f, (R4)
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MOVD 16(digPtr), R4
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VSTM c, g, (R4)
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MOVD 24(digPtr), R4
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VSTM d, h, (R4)
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RET
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