fix 1.17 error

sm2/p256_asm_amd64.s

@@ -4,6 +4,8 @@
 //                          256-bit primes"
 // https://link.springer.com/article/10.1007%2Fs13389-014-0090-x
 // https://eprint.iacr.org/2013/816.pdf
+//go:build amd64 && !generic
+// +build amd64,!generic
 
 #include "textflag.h"
 

sm2/p256_asm_arm64.s

@@ -4,6 +4,8 @@
 //                          256-bit primes"
 // http://link.springer.com/article/10.1007%2Fs13389-014-0090-x
 // https://eprint.iacr.org/2013/816.pdf
+//go:build arm64 && !generic
+// +build arm64,!generic
 
 #include "textflag.h"
 

sm3/sm3block_amd64.s

@@ -1,3 +1,6 @@
+//go:build amd64 && !generic
+// +build amd64,!generic
+
 #include "textflag.h"
 
 // Wt = Mt; for 0 <= t <= 3

sm3/sm3block_arm64.s

@@ -1,3 +1,6 @@
+//go:build arm64 && !generic
+// +build arm64,!generic
+
 #include "textflag.h"
 
 #define SI R0

sm3/sm3blockni_arm64.s

@@ -1,4 +1,6 @@
 // Generated by gen_sm3block_ni.go. DO NOT EDIT.
+//go:build arm64 && !generic
+// +build arm64,!generic
 
 #include "textflag.h"
 

sm4/asm_amd64.s

@@ -1,4 +1,7 @@
 // This SM4 implementation referenced https://github.com/mjosaarinen/sm4ni/blob/master/sm4ni.c
+//go:build amd64 && !generic
+// +build amd64,!generic
+
 #include "textflag.h"
 
 #define x X0

sm4/asm_arm64.s

@@ -1,3 +1,6 @@
+//go:build arm64 && !generic
+// +build arm64,!generic
+
 #include "textflag.h"
 
 #define x V0

sm4/gcm_amd64.s

@@ -4,6 +4,8 @@
 //     Instruction and its Usage for Computing the GCM Mode rev. 2.02
 // [2] Gueron, S., Krasnov, V.: Speeding up Counter Mode in Software and
 //     Hardware
+//go:build amd64 && !generic
+// +build amd64,!generic
 
 #include "textflag.h"
 

sm4/gcm_arm64.s

@@ -1,3 +1,6 @@
+//go:build arm64 && !generic
+// +build arm64,!generic
+
 #include "textflag.h"
 
 //nibble mask

sm4/gcm_sm4ni_arm64.s

@@ -1,3 +1,6 @@
+//go:build arm64 && !generic
+// +build arm64,!generic
+
 #include "textflag.h"
 
 #define B0 V0