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sm3: arm64 align format
This commit is contained in:
Sun Yimin
GitHub
parent
150f1bdb28
commit
e811c959ab
@ -24,234 +24,234 @@
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// Wt+4 = p1(x) XOR ROTL(7, Wt-9) XOR Wt-2
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// Wt+4 = p1(x) XOR ROTL(7, Wt-9) XOR Wt-2
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// for 12 <= t <= 63
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// for 12 <= t <= 63
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#define MSGSCHEDULE1(index) \
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#define MSGSCHEDULE1(index) \
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MOVW ((index+1)*4)(BP), AX; \
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MOVW ((index+1)*4)(BP), AX; \
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RORW $17, AX; \
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RORW $17, AX; \
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MOVW ((index-12)*4)(BP), BX; \
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MOVW ((index-12)*4)(BP), BX; \
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EORW BX, AX; \
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EORW BX, AX; \
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MOVW ((index-5)*4)(BP), BX; \
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MOVW ((index-5)*4)(BP), BX; \
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EORW BX, AX; \ // AX = x
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EORW BX, AX; \ // AX = x
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RORW $17, AX, BX; \ // BX = ROTL(15, x)
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RORW $17, AX, BX; \ // BX = ROTL(15, x)
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RORW $9, AX, CX; \ // CX = ROTL(23, x)
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RORW $9, AX, CX; \ // CX = ROTL(23, x)
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EORW BX, AX; \ // AX = x xor ROTL(15, x)
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EORW BX, AX; \ // AX = x xor ROTL(15, x)
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EORW CX, AX; \ // AX = x xor ROTL(15, x) xor ROTL(23, x)
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EORW CX, AX; \ // AX = x xor ROTL(15, x) xor ROTL(23, x)
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MOVW ((index-9)*4)(BP), BX; \
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MOVW ((index-9)*4)(BP), BX; \
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RORW $25, BX; \
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RORW $25, BX; \
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MOVW ((index-2)*4)(BP), CX; \
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MOVW ((index-2)*4)(BP), CX; \
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EORW BX, AX; \
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EORW BX, AX; \
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EORW CX, AX; \
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EORW CX, AX; \
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MOVW AX, ((index+4)*4)(BP)
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MOVW AX, ((index+4)*4)(BP)
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// Calculate ss1 in BX
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// Calculate ss1 in BX
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// x = ROTL(12, a) + e + ROTL(index, const)
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// x = ROTL(12, a) + e + ROTL(index, const)
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// ret = ROTL(7, x)
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// ret = ROTL(7, x)
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#define SM3SS1(const, a, e) \
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#define SM3SS1(const, a, e) \
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RORW $20, a, BX; \
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RORW $20, a, BX; \
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ADDW e, BX; \
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ADDW e, BX; \
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ADDW $const, BX; \
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ADDW $const, BX; \
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RORW $25, BX
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RORW $25, BX
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// Calculate tt1 in CX
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// Calculate tt1 in CX
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// ret = (a XOR b XOR c) + d + (ROTL(12, a) XOR ss1) + (Wt XOR Wt+4)
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// ret = (a XOR b XOR c) + d + (ROTL(12, a) XOR ss1) + (Wt XOR Wt+4)
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#define SM3TT10(index, a, b, c, d) \
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#define SM3TT10(index, a, b, c, d) \
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EORW a, b, DX; \
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EORW a, b, DX; \
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EORW c, DX; \ // (a XOR b XOR c)
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EORW c, DX; \ // (a XOR b XOR c)
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ADDW d, DX; \ // (a XOR b XOR c) + d
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ADDW d, DX; \ // (a XOR b XOR c) + d
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MOVW ((index)*4)(BP), hlp0; \ // Wt
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MOVW ((index)*4)(BP), hlp0; \ // Wt
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EORW hlp0, AX; \ // Wt XOR Wt+4
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EORW hlp0, AX; \ // Wt XOR Wt+4
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ADDW AX, DX; \
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ADDW AX, DX; \
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RORW $20, a, CX; \
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RORW $20, a, CX; \
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EORW BX, CX; \ // ROTL(12, a) XOR ss1
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EORW BX, CX; \ // ROTL(12, a) XOR ss1
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ADDW DX, CX // (a XOR b XOR c) + d + (ROTL(12, a) XOR ss1)
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ADDW DX, CX // (a XOR b XOR c) + d + (ROTL(12, a) XOR ss1)
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// Calculate tt2 in BX
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// Calculate tt2 in BX
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// ret = (e XOR f XOR g) + h + ss1 + Wt
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// ret = (e XOR f XOR g) + h + ss1 + Wt
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#define SM3TT20(e, f, g, h) \
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#define SM3TT20(e, f, g, h) \
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ADDW h, hlp0; \ // Wt + h
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ADDW h, hlp0; \ // Wt + h
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ADDW BX, hlp0; \ // Wt + h + ss1
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ADDW BX, hlp0; \ // Wt + h + ss1
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EORW e, f, BX; \ // e XOR f
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EORW e, f, BX; \ // e XOR f
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EORW g, BX; \ // e XOR f XOR g
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EORW g, BX; \ // e XOR f XOR g
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ADDW hlp0, BX // (e XOR f XOR g) + Wt + h + ss1
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ADDW hlp0, BX // (e XOR f XOR g) + Wt + h + ss1
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// Calculate tt1 in CX, used DX, hlp0
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// Calculate tt1 in CX, used DX, hlp0
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// ret = ((a AND b) OR (a AND c) OR (b AND c)) + d + (ROTL(12, a) XOR ss1) + (Wt XOR Wt+4)
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// ret = ((a AND b) OR (a AND c) OR (b AND c)) + d + (ROTL(12, a) XOR ss1) + (Wt XOR Wt+4)
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#define SM3TT11(index, a, b, c, d) \
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#define SM3TT11(index, a, b, c, d) \
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ANDW a, b, DX; \ // a AND b
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ANDW a, b, DX; \ // a AND b
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ANDW a, c, CX; \ // a AND c
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ANDW a, c, CX; \ // a AND c
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ORRW DX, CX; \ // (a AND b) OR (a AND c)
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ORRW DX, CX; \ // (a AND b) OR (a AND c)
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ANDW b, c, DX; \ // b AND c
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ANDW b, c, DX; \ // b AND c
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ORRW CX, DX; \ // (a AND b) OR (a AND c) OR (b AND c)
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ORRW CX, DX; \ // (a AND b) OR (a AND c) OR (b AND c)
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ADDW d, DX; \
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ADDW d, DX; \
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RORW $20, a, CX; \
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RORW $20, a, CX; \
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EORW BX, CX; \
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EORW BX, CX; \
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ADDW DX, CX; \ // ((a AND b) OR (a AND c) OR (b AND c)) + d + (ROTL(12, a) XOR ss1)
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ADDW DX, CX; \ // ((a AND b) OR (a AND c) OR (b AND c)) + d + (ROTL(12, a) XOR ss1)
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MOVW ((index)*4)(BP), hlp0; \
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MOVW ((index)*4)(BP), hlp0; \
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EORW hlp0, AX; \ // Wt XOR Wt+4
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EORW hlp0, AX; \ // Wt XOR Wt+4
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ADDW AX, CX
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ADDW AX, CX
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// Calculate tt2 in BX
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// Calculate tt2 in BX
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// ret = ((e AND f) OR (NOT(e) AND g)) + h + ss1 + Wt
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// ret = ((e AND f) OR (NOT(e) AND g)) + h + ss1 + Wt
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#define SM3TT21(e, f, g, h) \
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#define SM3TT21(e, f, g, h) \
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ADDW h, hlp0; \ // Wt + h
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ADDW h, hlp0; \ // Wt + h
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ADDW BX, hlp0; \ // h + ss1 + Wt
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ADDW BX, hlp0; \ // h + ss1 + Wt
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ANDW e, f, DX; \ // e AND f
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ANDW e, f, DX; \ // e AND f
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MVNW e, BX; \ // NOT(e)
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MVNW e, BX; \ // NOT(e)
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ANDW g, BX; \ // NOT(e) AND g
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ANDW g, BX; \ // NOT(e) AND g
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ORRW DX, BX; \
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ORRW DX, BX; \
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ADDW hlp0, BX
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ADDW hlp0, BX
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#define COPYRESULT(b, d, f, h) \
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#define COPYRESULT(b, d, f, h) \
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RORW $23, b; \
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RORW $23, b; \
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MOVW CX, h; \ // a = ttl
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MOVW CX, h; \ // a = ttl
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RORW $13, f; \
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RORW $13, f; \
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RORW $23, BX, CX; \
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RORW $23, BX, CX; \
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EORW BX, CX; \ // tt2 XOR ROTL(9, tt2)
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EORW BX, CX; \ // tt2 XOR ROTL(9, tt2)
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RORW $15, BX; \
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RORW $15, BX; \
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EORW BX, CX; \ // tt2 XOR ROTL(9, tt2) XOR ROTL(17, tt2)
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EORW BX, CX; \ // tt2 XOR ROTL(9, tt2) XOR ROTL(17, tt2)
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MOVW CX, d // e = tt2 XOR ROTL(9, tt2) XOR ROTL(17, tt2)
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MOVW CX, d // e = tt2 XOR ROTL(9, tt2) XOR ROTL(17, tt2)
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#define SM3ROUND0(index, const, a, b, c, d, e, f, g, h) \
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#define SM3ROUND0(index, const, a, b, c, d, e, f, g, h) \
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MSGSCHEDULE01(index); \
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MSGSCHEDULE01(index); \
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SM3SS1(const, a, e); \
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SM3SS1(const, a, e); \
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SM3TT10(index, a, b, c, d); \
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SM3TT10(index, a, b, c, d); \
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SM3TT20(e, f, g, h); \
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SM3TT20(e, f, g, h); \
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COPYRESULT(b, d, f, h)
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COPYRESULT(b, d, f, h)
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#define SM3ROUND1(index, const, a, b, c, d, e, f, g, h) \
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#define SM3ROUND1(index, const, a, b, c, d, e, f, g, h) \
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MSGSCHEDULE1(index); \
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MSGSCHEDULE1(index); \
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SM3SS1(const, a, e); \
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SM3SS1(const, a, e); \
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SM3TT10(index, a, b, c, d); \
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SM3TT10(index, a, b, c, d); \
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SM3TT20(e, f, g, h); \
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SM3TT20(e, f, g, h); \
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COPYRESULT(b, d, f, h)
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COPYRESULT(b, d, f, h)
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#define SM3ROUND2(index, const, a, b, c, d, e, f, g, h) \
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#define SM3ROUND2(index, const, a, b, c, d, e, f, g, h) \
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MSGSCHEDULE1(index); \
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MSGSCHEDULE1(index); \
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SM3SS1(const, a, e); \
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SM3SS1(const, a, e); \
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SM3TT11(index, a, b, c, d); \
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SM3TT11(index, a, b, c, d); \
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SM3TT21(e, f, g, h); \
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SM3TT21(e, f, g, h); \
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COPYRESULT(b, d, f, h)
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COPYRESULT(b, d, f, h)
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// func blockARM64(dig *digest, p []byte)
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// func blockARM64(dig *digest, p []byte)
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TEXT ·blockARM64(SB), 0, $272-32
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TEXT ·blockARM64(SB), 0, $272-32
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MOVD dig+0(FP), hlp1
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MOVD dig+0(FP), hlp1
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MOVD p_base+8(FP), SI
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MOVD p_base+8(FP), SI
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MOVD p_len+16(FP), DX
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MOVD p_len+16(FP), DX
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MOVD RSP, BP
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MOVD RSP, BP
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AND $~63, DX
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AND $~63, DX
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CBZ DX, end
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CBZ DX, end
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ADD SI, DX, DI
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ADD SI, DX, DI
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LDPW (0*8)(hlp1), (R19, R20)
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LDPW (0*8)(hlp1), (R19, R20)
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LDPW (1*8)(hlp1), (R21, R22)
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LDPW (1*8)(hlp1), (R21, R22)
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LDPW (2*8)(hlp1), (R23, R24)
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LDPW (2*8)(hlp1), (R23, R24)
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LDPW (3*8)(hlp1), (R25, R26)
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LDPW (3*8)(hlp1), (R25, R26)
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loop:
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loop:
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MOVW R19, R10
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MOVW R19, R10
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MOVW R20, R11
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MOVW R20, R11
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MOVW R21, R12
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MOVW R21, R12
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MOVW R22, R13
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MOVW R22, R13
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MOVW R23, R14
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MOVW R23, R14
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MOVW R24, R15
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MOVW R24, R15
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MOVW R25, R16
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MOVW R25, R16
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MOVW R26, R17
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MOVW R26, R17
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// Wt = Mt; for 0 <= t <= 3
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// Wt = Mt; for 0 <= t <= 3
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LDPW (0*8)(SI), (AX, BX)
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LDPW (0*8)(SI), (AX, BX)
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REVW AX, AX
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REVW AX, AX
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REVW BX, BX
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REVW BX, BX
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STPW (AX, BX), (0*8)(BP)
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STPW (AX, BX), (0*8)(BP)
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LDPW (1*8)(SI), (CX, DX)
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LDPW (1*8)(SI), (CX, DX)
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REVW CX, CX
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REVW CX, CX
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REVW DX, DX
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REVW DX, DX
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STPW (CX, DX), (1*8)(BP)
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STPW (CX, DX), (1*8)(BP)
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SM3ROUND0(0, 0x79cc4519, R19, R20, R21, R22, R23, R24, R25, R26)
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SM3ROUND0(0, 0x79cc4519, R19, R20, R21, R22, R23, R24, R25, R26)
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SM3ROUND0(1, 0xf3988a32, R26, R19, R20, R21, R22, R23, R24, R25)
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SM3ROUND0(1, 0xf3988a32, R26, R19, R20, R21, R22, R23, R24, R25)
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SM3ROUND0(2, 0xe7311465, R25, R26, R19, R20, R21, R22, R23, R24)
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SM3ROUND0(2, 0xe7311465, R25, R26, R19, R20, R21, R22, R23, R24)
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SM3ROUND0(3, 0xce6228cb, R24, R25, R26, R19, R20, R21, R22, R23)
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SM3ROUND0(3, 0xce6228cb, R24, R25, R26, R19, R20, R21, R22, R23)
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SM3ROUND0(4, 0x9cc45197, R23, R24, R25, R26, R19, R20, R21, R22)
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SM3ROUND0(4, 0x9cc45197, R23, R24, R25, R26, R19, R20, R21, R22)
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SM3ROUND0(5, 0x3988a32f, R22, R23, R24, R25, R26, R19, R20, R21)
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SM3ROUND0(5, 0x3988a32f, R22, R23, R24, R25, R26, R19, R20, R21)
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SM3ROUND0(6, 0x7311465e, R21, R22, R23, R24, R25, R26, R19, R20)
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SM3ROUND0(6, 0x7311465e, R21, R22, R23, R24, R25, R26, R19, R20)
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SM3ROUND0(7, 0xe6228cbc, R20, R21, R22, R23, R24, R25, R26, R19)
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SM3ROUND0(7, 0xe6228cbc, R20, R21, R22, R23, R24, R25, R26, R19)
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SM3ROUND0(8, 0xcc451979, R19, R20, R21, R22, R23, R24, R25, R26)
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SM3ROUND0(8, 0xcc451979, R19, R20, R21, R22, R23, R24, R25, R26)
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SM3ROUND0(9, 0x988a32f3, R26, R19, R20, R21, R22, R23, R24, R25)
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SM3ROUND0(9, 0x988a32f3, R26, R19, R20, R21, R22, R23, R24, R25)
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SM3ROUND0(10, 0x311465e7, R25, R26, R19, R20, R21, R22, R23, R24)
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SM3ROUND0(10, 0x311465e7, R25, R26, R19, R20, R21, R22, R23, R24)
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SM3ROUND0(11, 0x6228cbce, R24, R25, R26, R19, R20, R21, R22, R23)
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SM3ROUND0(11, 0x6228cbce, R24, R25, R26, R19, R20, R21, R22, R23)
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SM3ROUND1(12, 0xc451979c, R23, R24, R25, R26, R19, R20, R21, R22)
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SM3ROUND1(12, 0xc451979c, R23, R24, R25, R26, R19, R20, R21, R22)
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SM3ROUND1(13, 0x88a32f39, R22, R23, R24, R25, R26, R19, R20, R21)
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SM3ROUND1(13, 0x88a32f39, R22, R23, R24, R25, R26, R19, R20, R21)
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SM3ROUND1(14, 0x11465e73, R21, R22, R23, R24, R25, R26, R19, R20)
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SM3ROUND1(14, 0x11465e73, R21, R22, R23, R24, R25, R26, R19, R20)
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SM3ROUND1(15, 0x228cbce6, R20, R21, R22, R23, R24, R25, R26, R19)
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SM3ROUND1(15, 0x228cbce6, R20, R21, R22, R23, R24, R25, R26, R19)
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SM3ROUND2(16, 0x9d8a7a87, R19, R20, R21, R22, R23, R24, R25, R26)
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SM3ROUND2(16, 0x9d8a7a87, R19, R20, R21, R22, R23, R24, R25, R26)
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SM3ROUND2(17, 0x3b14f50f, R26, R19, R20, R21, R22, R23, R24, R25)
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SM3ROUND2(17, 0x3b14f50f, R26, R19, R20, R21, R22, R23, R24, R25)
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SM3ROUND2(18, 0x7629ea1e, R25, R26, R19, R20, R21, R22, R23, R24)
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SM3ROUND2(18, 0x7629ea1e, R25, R26, R19, R20, R21, R22, R23, R24)
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SM3ROUND2(19, 0xec53d43c, R24, R25, R26, R19, R20, R21, R22, R23)
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SM3ROUND2(19, 0xec53d43c, R24, R25, R26, R19, R20, R21, R22, R23)
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SM3ROUND2(20, 0xd8a7a879, R23, R24, R25, R26, R19, R20, R21, R22)
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SM3ROUND2(20, 0xd8a7a879, R23, R24, R25, R26, R19, R20, R21, R22)
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SM3ROUND2(21, 0xb14f50f3, R22, R23, R24, R25, R26, R19, R20, R21)
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SM3ROUND2(21, 0xb14f50f3, R22, R23, R24, R25, R26, R19, R20, R21)
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SM3ROUND2(22, 0x629ea1e7, R21, R22, R23, R24, R25, R26, R19, R20)
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SM3ROUND2(22, 0x629ea1e7, R21, R22, R23, R24, R25, R26, R19, R20)
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SM3ROUND2(23, 0xc53d43ce, R20, R21, R22, R23, R24, R25, R26, R19)
|
SM3ROUND2(23, 0xc53d43ce, R20, R21, R22, R23, R24, R25, R26, R19)
|
||||||
SM3ROUND2(24, 0x8a7a879d, R19, R20, R21, R22, R23, R24, R25, R26)
|
SM3ROUND2(24, 0x8a7a879d, R19, R20, R21, R22, R23, R24, R25, R26)
|
||||||
SM3ROUND2(25, 0x14f50f3b, R26, R19, R20, R21, R22, R23, R24, R25)
|
SM3ROUND2(25, 0x14f50f3b, R26, R19, R20, R21, R22, R23, R24, R25)
|
||||||
SM3ROUND2(26, 0x29ea1e76, R25, R26, R19, R20, R21, R22, R23, R24)
|
SM3ROUND2(26, 0x29ea1e76, R25, R26, R19, R20, R21, R22, R23, R24)
|
||||||
SM3ROUND2(27, 0x53d43cec, R24, R25, R26, R19, R20, R21, R22, R23)
|
SM3ROUND2(27, 0x53d43cec, R24, R25, R26, R19, R20, R21, R22, R23)
|
||||||
SM3ROUND2(28, 0xa7a879d8, R23, R24, R25, R26, R19, R20, R21, R22)
|
SM3ROUND2(28, 0xa7a879d8, R23, R24, R25, R26, R19, R20, R21, R22)
|
||||||
SM3ROUND2(29, 0x4f50f3b1, R22, R23, R24, R25, R26, R19, R20, R21)
|
SM3ROUND2(29, 0x4f50f3b1, R22, R23, R24, R25, R26, R19, R20, R21)
|
||||||
SM3ROUND2(30, 0x9ea1e762, R21, R22, R23, R24, R25, R26, R19, R20)
|
SM3ROUND2(30, 0x9ea1e762, R21, R22, R23, R24, R25, R26, R19, R20)
|
||||||
SM3ROUND2(31, 0x3d43cec5, R20, R21, R22, R23, R24, R25, R26, R19)
|
SM3ROUND2(31, 0x3d43cec5, R20, R21, R22, R23, R24, R25, R26, R19)
|
||||||
SM3ROUND2(32, 0x7a879d8a, R19, R20, R21, R22, R23, R24, R25, R26)
|
SM3ROUND2(32, 0x7a879d8a, R19, R20, R21, R22, R23, R24, R25, R26)
|
||||||
SM3ROUND2(33, 0xf50f3b14, R26, R19, R20, R21, R22, R23, R24, R25)
|
SM3ROUND2(33, 0xf50f3b14, R26, R19, R20, R21, R22, R23, R24, R25)
|
||||||
SM3ROUND2(34, 0xea1e7629, R25, R26, R19, R20, R21, R22, R23, R24)
|
SM3ROUND2(34, 0xea1e7629, R25, R26, R19, R20, R21, R22, R23, R24)
|
||||||
SM3ROUND2(35, 0xd43cec53, R24, R25, R26, R19, R20, R21, R22, R23)
|
SM3ROUND2(35, 0xd43cec53, R24, R25, R26, R19, R20, R21, R22, R23)
|
||||||
SM3ROUND2(36, 0xa879d8a7, R23, R24, R25, R26, R19, R20, R21, R22)
|
SM3ROUND2(36, 0xa879d8a7, R23, R24, R25, R26, R19, R20, R21, R22)
|
||||||
SM3ROUND2(37, 0x50f3b14f, R22, R23, R24, R25, R26, R19, R20, R21)
|
SM3ROUND2(37, 0x50f3b14f, R22, R23, R24, R25, R26, R19, R20, R21)
|
||||||
SM3ROUND2(38, 0xa1e7629e, R21, R22, R23, R24, R25, R26, R19, R20)
|
SM3ROUND2(38, 0xa1e7629e, R21, R22, R23, R24, R25, R26, R19, R20)
|
||||||
SM3ROUND2(39, 0x43cec53d, R20, R21, R22, R23, R24, R25, R26, R19)
|
SM3ROUND2(39, 0x43cec53d, R20, R21, R22, R23, R24, R25, R26, R19)
|
||||||
SM3ROUND2(40, 0x879d8a7a, R19, R20, R21, R22, R23, R24, R25, R26)
|
SM3ROUND2(40, 0x879d8a7a, R19, R20, R21, R22, R23, R24, R25, R26)
|
||||||
SM3ROUND2(41, 0xf3b14f5, R26, R19, R20, R21, R22, R23, R24, R25)
|
SM3ROUND2(41, 0xf3b14f5, R26, R19, R20, R21, R22, R23, R24, R25)
|
||||||
SM3ROUND2(42, 0x1e7629ea, R25, R26, R19, R20, R21, R22, R23, R24)
|
SM3ROUND2(42, 0x1e7629ea, R25, R26, R19, R20, R21, R22, R23, R24)
|
||||||
SM3ROUND2(43, 0x3cec53d4, R24, R25, R26, R19, R20, R21, R22, R23)
|
SM3ROUND2(43, 0x3cec53d4, R24, R25, R26, R19, R20, R21, R22, R23)
|
||||||
SM3ROUND2(44, 0x79d8a7a8, R23, R24, R25, R26, R19, R20, R21, R22)
|
SM3ROUND2(44, 0x79d8a7a8, R23, R24, R25, R26, R19, R20, R21, R22)
|
||||||
SM3ROUND2(45, 0xf3b14f50, R22, R23, R24, R25, R26, R19, R20, R21)
|
SM3ROUND2(45, 0xf3b14f50, R22, R23, R24, R25, R26, R19, R20, R21)
|
||||||
SM3ROUND2(46, 0xe7629ea1, R21, R22, R23, R24, R25, R26, R19, R20)
|
SM3ROUND2(46, 0xe7629ea1, R21, R22, R23, R24, R25, R26, R19, R20)
|
||||||
SM3ROUND2(47, 0xcec53d43, R20, R21, R22, R23, R24, R25, R26, R19)
|
SM3ROUND2(47, 0xcec53d43, R20, R21, R22, R23, R24, R25, R26, R19)
|
||||||
SM3ROUND2(48, 0x9d8a7a87, R19, R20, R21, R22, R23, R24, R25, R26)
|
SM3ROUND2(48, 0x9d8a7a87, R19, R20, R21, R22, R23, R24, R25, R26)
|
||||||
SM3ROUND2(49, 0x3b14f50f, R26, R19, R20, R21, R22, R23, R24, R25)
|
SM3ROUND2(49, 0x3b14f50f, R26, R19, R20, R21, R22, R23, R24, R25)
|
||||||
SM3ROUND2(50, 0x7629ea1e, R25, R26, R19, R20, R21, R22, R23, R24)
|
SM3ROUND2(50, 0x7629ea1e, R25, R26, R19, R20, R21, R22, R23, R24)
|
||||||
SM3ROUND2(51, 0xec53d43c, R24, R25, R26, R19, R20, R21, R22, R23)
|
SM3ROUND2(51, 0xec53d43c, R24, R25, R26, R19, R20, R21, R22, R23)
|
||||||
SM3ROUND2(52, 0xd8a7a879, R23, R24, R25, R26, R19, R20, R21, R22)
|
SM3ROUND2(52, 0xd8a7a879, R23, R24, R25, R26, R19, R20, R21, R22)
|
||||||
SM3ROUND2(53, 0xb14f50f3, R22, R23, R24, R25, R26, R19, R20, R21)
|
SM3ROUND2(53, 0xb14f50f3, R22, R23, R24, R25, R26, R19, R20, R21)
|
||||||
SM3ROUND2(54, 0x629ea1e7, R21, R22, R23, R24, R25, R26, R19, R20)
|
SM3ROUND2(54, 0x629ea1e7, R21, R22, R23, R24, R25, R26, R19, R20)
|
||||||
SM3ROUND2(55, 0xc53d43ce, R20, R21, R22, R23, R24, R25, R26, R19)
|
SM3ROUND2(55, 0xc53d43ce, R20, R21, R22, R23, R24, R25, R26, R19)
|
||||||
SM3ROUND2(56, 0x8a7a879d, R19, R20, R21, R22, R23, R24, R25, R26)
|
SM3ROUND2(56, 0x8a7a879d, R19, R20, R21, R22, R23, R24, R25, R26)
|
||||||
SM3ROUND2(57, 0x14f50f3b, R26, R19, R20, R21, R22, R23, R24, R25)
|
SM3ROUND2(57, 0x14f50f3b, R26, R19, R20, R21, R22, R23, R24, R25)
|
||||||
SM3ROUND2(58, 0x29ea1e76, R25, R26, R19, R20, R21, R22, R23, R24)
|
SM3ROUND2(58, 0x29ea1e76, R25, R26, R19, R20, R21, R22, R23, R24)
|
||||||
SM3ROUND2(59, 0x53d43cec, R24, R25, R26, R19, R20, R21, R22, R23)
|
SM3ROUND2(59, 0x53d43cec, R24, R25, R26, R19, R20, R21, R22, R23)
|
||||||
SM3ROUND2(60, 0xa7a879d8, R23, R24, R25, R26, R19, R20, R21, R22)
|
SM3ROUND2(60, 0xa7a879d8, R23, R24, R25, R26, R19, R20, R21, R22)
|
||||||
SM3ROUND2(61, 0x4f50f3b1, R22, R23, R24, R25, R26, R19, R20, R21)
|
SM3ROUND2(61, 0x4f50f3b1, R22, R23, R24, R25, R26, R19, R20, R21)
|
||||||
SM3ROUND2(62, 0x9ea1e762, R21, R22, R23, R24, R25, R26, R19, R20)
|
SM3ROUND2(62, 0x9ea1e762, R21, R22, R23, R24, R25, R26, R19, R20)
|
||||||
SM3ROUND2(63, 0x3d43cec5, R20, R21, R22, R23, R24, R25, R26, R19)
|
SM3ROUND2(63, 0x3d43cec5, R20, R21, R22, R23, R24, R25, R26, R19)
|
||||||
|
|
||||||
EORW R10, R19 // H0 = a XOR H0
|
EORW R10, R19 // H0 = a XOR H0
|
||||||
EORW R11, R20 // H1 = b XOR H1
|
EORW R11, R20 // H1 = b XOR H1
|
||||||
EORW R12, R21 // H0 = a XOR H0
|
EORW R12, R21 // H0 = a XOR H0
|
||||||
EORW R13, R22 // H1 = b XOR H1
|
EORW R13, R22 // H1 = b XOR H1
|
||||||
EORW R14, R23 // H0 = a XOR H0
|
EORW R14, R23 // H0 = a XOR H0
|
||||||
EORW R15, R24 // H1 = b XOR H1
|
EORW R15, R24 // H1 = b XOR H1
|
||||||
EORW R16, R25 // H0 = a XOR H0
|
EORW R16, R25 // H0 = a XOR H0
|
||||||
EORW R17, R26 // H1 = b XOR H1
|
EORW R17, R26 // H1 = b XOR H1
|
||||||
|
|
||||||
ADD $64, SI
|
ADD $64, SI
|
||||||
CMP SI, DI
|
CMP SI, DI
|
||||||
BNE loop
|
BNE loop
|
||||||
|
|
||||||
STPW (R19, R20), (0*8)(hlp1)
|
STPW (R19, R20), (0*8)(hlp1)
|
||||||
STPW (R21, R22), (1*8)(hlp1)
|
STPW (R21, R22), (1*8)(hlp1)
|
||||||
STPW (R23, R24), (2*8)(hlp1)
|
STPW (R23, R24), (2*8)(hlp1)
|
||||||
STPW (R25, R26), (3*8)(hlp1)
|
STPW (R25, R26), (3*8)(hlp1)
|
||||||
|
|
||||||
end:
|
end:
|
||||||
RET
|
RET
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user