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zuc: ppc64x core fix 3
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3196df5637
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c8a9036abf
@ -130,7 +130,7 @@ GLOBL rcon<>(SB), RODATA, $160
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MOVWZ (((9 + idx) % 16)*4)(addr), tmpR2 \
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MOVWZ (((9 + idx) % 16)*4)(addr), tmpR2 \
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MOVWZ (((7 + idx) % 16)*4)(addr), BRC_X2 \
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MOVWZ (((7 + idx) % 16)*4)(addr), BRC_X2 \
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MOVWZ (((5 + idx) % 16)*4)(addr), tmpR3 \
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MOVWZ (((5 + idx) % 16)*4)(addr), tmpR3 \
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MOVWZ (((2 + idx) % 16)*4)(addr), BRC_X4 \
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MOVWZ (((2 + idx) % 16)*4)(addr), BRC_X3 \
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MOVWZ (((0 + idx) % 16)*4)(addr), tmpR4 \
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MOVWZ (((0 + idx) % 16)*4)(addr), tmpR4 \
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SRW $15, BRC_X0, BRC_X0 \
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SRW $15, BRC_X0, BRC_X0 \
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SLW $16, tmpR1, tmpR1 \
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SLW $16, tmpR1, tmpR1 \
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@ -140,7 +140,7 @@ GLOBL rcon<>(SB), RODATA, $160
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SHLDL(BRC_X0, tmpR1, $16) \
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SHLDL(BRC_X0, tmpR1, $16) \
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SHLDL(BRC_X1, tmpR2, $16) \
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SHLDL(BRC_X1, tmpR2, $16) \
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SHLDL(BRC_X2, tmpR3, $16) \
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SHLDL(BRC_X2, tmpR3, $16) \
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SHLDL(BRC_X4, tmpR4, $16)
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SHLDL(BRC_X3, tmpR4, $16)
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#define LOAD_STATE(addr) \
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#define LOAD_STATE(addr) \
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MOVWZ OFFSET_FR1(addr), F_R1 \
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MOVWZ OFFSET_FR1(addr), F_R1 \
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@ -194,7 +194,7 @@ GLOBL rcon<>(SB), RODATA, $160
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VAND S0_MASK, V0, V0 \
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VAND S0_MASK, V0, V0 \
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VAND S1_MASK, V1, V1 \
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VAND S1_MASK, V1, V1 \
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VXOR V0, V1, V0 \
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VXOR V0, V1, V0 \
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MFVSRD V0, DX \
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MFVSRD V0, DX \
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SRD $32, DX, F_R1 \
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SRD $32, DX, F_R1 \
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MOVWZ DX, F_R2
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MOVWZ DX, F_R2
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@ -272,6 +272,7 @@ TEXT ·genKeywordAsm(SB),NOSPLIT,$0
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MOVD pState+0(FP), R4
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MOVD pState+0(FP), R4
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LOAD_STATE(R4)
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LOAD_STATE(R4)
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BITS_REORG(0, R4, R14, R15, R16, R17)
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NONLIN_FUN(R14, R15, R16, R17)
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NONLIN_FUN(R14, R15, R16, R17)
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// (BRC_X3 xor W) as result
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// (BRC_X3 xor W) as result
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XOR BRC_X3, R14
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XOR BRC_X3, R14
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