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use VREV32

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This commit is contained in:
Emman 2022-01-05 08:39:59 +08:00
parent c78a37b66d
commit bcd16fa771
1 changed files with 62 additions and 71 deletions
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35
sm4/asm_arm64.s
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@ -7,7 +7,6 @@
#define t2 V4
#define t3 V5
#define ZERO V16
#define FLIP_MASK V17
#define NIBBLE_MASK V20
#define INVERSE_SHIFT_ROWS V21
#define M1L V22
@ -21,11 +20,6 @@
#define XTMP6 V6
#define XTMP7 V7
// shuffle byte order from LE to BE
DATA flip_mask<>+0x00(SB)/8, $0x0405060700010203
DATA flip_mask<>+0x08(SB)/8, $0x0c0d0e0f08090a0b
GLOBL flip_mask<>(SB), (NOPTR+RODATA), $16
//nibble mask
DATA nibble_mask<>+0x00(SB)/8, $0x0F0F0F0F0F0F0F0F
DATA nibble_mask<>+0x08(SB)/8, $0x0F0F0F0F0F0F0F0F
@ -115,9 +109,6 @@ GLOBL fk_mask<>(SB), (NOPTR+RODATA), $16
VEOR x.B16, y.B16, x.B16
#define load_global_data_1() \
LDP flip_mask<>(SB), (R0, R1) \
VMOV R0, FLIP_MASK.D[0] \
VMOV R1, FLIP_MASK.D[1] \
LDP nibble_mask<>(SB), (R0, R1) \
VMOV R0, NIBBLE_MASK.D[0] \
VMOV R1, NIBBLE_MASK.D[1] \
@ -162,7 +153,7 @@ TEXT ·expandKeyAsm(SB),NOSPLIT,$0
load_global_data_1()
VLD1 (R8), [t0.B16]
VTBL FLIP_MASK.B16, [t0.B16], t0.B16
VREV32 t0.B16, t0.B16
VEOR t0.B16, FK_MASK.B16, t0.B16
VMOV t0.S[1], t1.S[0]
VMOV t0.S[2], t2.S[0]
@ -259,10 +250,10 @@ TEXT ·encryptBlocksAsm(SB),NOSPLIT,$0
load_global_data_2()
VTBL FLIP_MASK.B16, [t0.B16], t0.B16
VTBL FLIP_MASK.B16, [t1.B16], t1.B16
VTBL FLIP_MASK.B16, [t2.B16], t2.B16
VTBL FLIP_MASK.B16, [t3.B16], t3.B16
VREV32 t0.B16, t0.B16
VREV32 t1.B16, t1.B16
VREV32 t2.B16, t2.B16
VREV32 t3.B16, t3.B16
VEOR ZERO.B16, ZERO.B16, ZERO.B16
EOR R0, R0
@ -316,10 +307,10 @@ encryptBlocksLoop:
CMP $128, R0
BNE encryptBlocksLoop
VTBL FLIP_MASK.B16, [t0.B16], t0.B16
VTBL FLIP_MASK.B16, [t1.B16], t1.B16
VTBL FLIP_MASK.B16, [t2.B16], t2.B16
VTBL FLIP_MASK.B16, [t3.B16], t3.B16
VREV32 t0.B16, t0.B16
VREV32 t1.B16, t1.B16
VREV32 t2.B16, t2.B16
VREV32 t3.B16, t3.B16
VMOV t3.S[0], V8.S[0]
VMOV t2.S[0], V8.S[1]
@ -419,10 +410,10 @@ encryptBlockLoop:
CMP $128, R0
BNE encryptBlockLoop
VTBL FLIP_MASK.B16, [t0.B16], t0.B16
VTBL FLIP_MASK.B16, [t1.B16], t1.B16
VTBL FLIP_MASK.B16, [t2.B16], t2.B16
VTBL FLIP_MASK.B16, [t3.B16], t3.B16
VREV32 t0.B16, t0.B16
VREV32 t1.B16, t1.B16
VREV32 t2.B16, t2.B16
VREV32 t3.B16, t3.B16
VMOV t3.S[0], V8.S[0]
VMOV t2.S[0], V8.S[1]