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sm3: arm64, try BIC instruction

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Sun Yimin 2023-09-13 17:29:32 +08:00 committed by GitHub
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sm3/sm3block_arm64.s
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@ -94,8 +94,7 @@
ADDW h, hlp0; \ // Wt + h ADDW h, hlp0; \ // Wt + h
ADDW BX, hlp0; \ // h + ss1 + Wt ADDW BX, hlp0; \ // h + ss1 + Wt
ANDW e, f, DX; \ // e AND f ANDW e, f, DX; \ // e AND f
MVNW e, BX; \ // NOT(e) BICW e, g, BX; \ // NOT(e) AND g
ANDW g, BX; \ // NOT(e) AND g
ORRW DX, BX; \ ORRW DX, BX; \
ADDW hlp0, BX ADDW hlp0, BX