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Update asm_arm64.s
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@ -73,37 +73,19 @@ GLOBL fk_mask<>(SB), (NOPTR+RODATA), $16
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#define SM4_SBOX(x, y) \
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#define SM4_SBOX(x, y) \
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; \ //############################# inner affine ############################//
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; \ //############################# inner affine ############################//
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LDP nibble_mask<>(SB), (R0, R1); \
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VAND x.B16, NIBBLE_MASK.B16, XTMP7.B16; \
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VMOV R0, XTMP6.D[0]; \
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VTBL XTMP7.B16, [M1L.B16], y.B16; \
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VMOV R1, XTMP6.D[1]; \
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VAND x.B16, XTMP6.B16, XTMP7.B16; \
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LDP m1_low<>(SB), (R0, R1); \
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VMOV R0, y.D[0]; \
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VMOV R1, y.D[1]; \
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VTBL XTMP7.B16, [y.B16], y.B16; \
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VUSHR $4, x.D2, x.D2; \
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VUSHR $4, x.D2, x.D2; \
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VAND x.B16, XTMP6.B16, XTMP7.B16; \
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VAND x.B16, NIBBLE_MASK.B16, XTMP7.B16; \
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LDP m1_low<>(SB), (R0, R1); \
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VTBL XTMP7.B16, [M1H.B16], XTMP7.B16; \
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VMOV R0, V8.D[0]; \
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VMOV R1, V8.D[1]; \
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VTBL XTMP7.B16, [V8.B16], XTMP7.B16; \
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VEOR y.B16, XTMP7.B16, x.B16; \
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VEOR y.B16, XTMP7.B16, x.B16; \
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LDP inverse_shift_rows<>(SB), (R0, R1); \
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VTBL INVERSE_SHIFT_ROWS.B16, [x.B16], x.B16; \
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VMOV R0, V8.D[0]; \
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VMOV R1, V8.D[1]; \
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VTBL V8.B16, [x.B16], x.B16; \
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AESE ZERO.B16, x.B16; \
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AESE ZERO.B16, x.B16; \
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VAND x.B16, XTMP6.B16, XTMP7.B16; \
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VAND x.B16, NIBBLE_MASK.B16, XTMP7.B16; \
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LDP m2_low<>(SB), (R0, R1); \
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VTBL XTMP7.B16, [M2L.B16], y.B16; \
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VMOV R0, y.D[0]; \
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VMOV R1, y.D[1]; \
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VTBL XTMP7.B16, [y.B16], y.B16; \
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VUSHR $4, x.D2, x.D2; \
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VUSHR $4, x.D2, x.D2; \
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VAND x.B16, XTMP6.B16, XTMP7.B16; \
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VAND x.B16, NIBBLE_MASK.B16, XTMP7.B16; \
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LDP m2_high<>(SB), (R0, R1); \
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VTBL XTMP7.B16, [M2H.B16], XTMP7.B16; \
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VMOV R0, V8.D[0]; \
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VMOV R1, V8.D[1]; \
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VTBL XTMP7.B16, [V8.B16], XTMP7.B16; \
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VEOR y.B16, XTMP7.B16, x.B16
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VEOR y.B16, XTMP7.B16, x.B16
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#define SM4_TAO_L1(x, y) \
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#define SM4_TAO_L1(x, y) \
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@ -130,6 +112,7 @@ GLOBL fk_mask<>(SB), (NOPTR+RODATA), $16
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VEOR y.B16, x.B16, x.B16
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VEOR y.B16, x.B16, x.B16
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#define SM4_TAO_L2(x, y) \
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#define SM4_TAO_L2(x, y) \
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SM4_SBOX(x, y); \
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; \ //#################### 4 parallel L2 linear transforms ##################//
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; \ //#################### 4 parallel L2 linear transforms ##################//
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VSHL $13, x.S4, XTMP6.S4; \
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VSHL $13, x.S4, XTMP6.S4; \
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VUSHR $19, x.S4, y.S4; \
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VUSHR $19, x.S4, y.S4; \
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