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zuc: arm64, uses new method to load global data

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Sun Yimin 2023-11-08 13:43:56 +08:00 committed by GitHub
parent 80e88ea2b2
commit 84045dc25f
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 36 additions and 54 deletions
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65
zuc/asm_arm64.s
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@ -86,45 +86,32 @@ GLOBL mask_S1<>(SB), RODATA, $16
#define OFFSET_BRC_X3 (21*4) #define OFFSET_BRC_X3 (21*4)
#define LOAD_GLOBAL_DATA() \ #define LOAD_GLOBAL_DATA() \
LDP nibble_mask<>(SB), (R0, R1) \ MOVD $nibble_mask<>(SB), R0 \
VMOV R0, NIBBLE_MASK.D[0] \ VLD1 (R0), [NIBBLE_MASK.B16] \
VMOV R1, NIBBLE_MASK.D[1] \ MOVD $Top3_bits_of_the_byte<>(SB), R0 \
LDP Top3_bits_of_the_byte<>(SB), (R0, R1) \ VLD1 (R0), [TOP3_BITS.B16] \
VMOV R0, TOP3_BITS.D[0] \ MOVD $Bottom5_bits_of_the_byte<>(SB), R0 \
VMOV R1, TOP3_BITS.D[1] \ VLD1 (R0), [BOTTOM5_BITS.B16] \
LDP Bottom5_bits_of_the_byte<>(SB), (R0, R1) \ MOVD $Aes_to_Zuc_mul_low_nibble<>(SB), R0 \
VMOV R0, BOTTOM5_BITS.D[0] \ VLD1 (R0), [M1L.B16] \
VMOV R1, BOTTOM5_BITS.D[1] \ MOVD $Aes_to_Zuc_mul_high_nibble<>(SB), R0 \
LDP Aes_to_Zuc_mul_low_nibble<>(SB), (R0, R1) \ VLD1 (R0), [M1H.B16] \
VMOV R0, M1L.D[0] \ MOVD $Comb_matrix_mul_low_nibble<>(SB), R0 \
VMOV R1, M1L.D[1] \ VLD1 (R0), [M2L.B16] \
LDP Aes_to_Zuc_mul_high_nibble<>(SB), (R0, R1) \ MOVD $Comb_matrix_mul_high_nibble<>(SB), R0 \
VMOV R0, M1H.D[0] \ VLD1 (R0), [M2H.B16] \
VMOV R1, M1H.D[1] \ MOVD $P1_data<>(SB), R0 \
LDP Comb_matrix_mul_low_nibble<>(SB), (R0, R1) \ VLD1 (R0), [P1.B16] \
VMOV R0, M2L.D[0] \ MOVD $P2_data<>(SB), R0 \
VMOV R1, M2L.D[1] \ VLD1 (R0), [P2.B16] \
LDP Comb_matrix_mul_high_nibble<>(SB), (R0, R1) \ MOVD $P3_data<>(SB), R0 \
VMOV R0, M2H.D[0] \ VLD1 (R0), [P3.B16] \
VMOV R1, M2H.D[1] \ MOVD $mask_S0<>(SB), R0 \
LDP P1_data<>(SB), (R0, R1) \ VLD1 (R0), [S0_MASK.B16] \
VMOV R0, P1.D[0] \ MOVD $mask_S1<>(SB), R0 \
VMOV R1, P1.D[1] \ VLD1 (R0), [S1_MASK.B16] \
LDP P2_data<>(SB), (R0, R1) \ MOVD $Shuf_mask<>(SB), R0 \
VMOV R0, P2.D[0] \ VLD1 (R0), [INVERSE_SHIFT_ROWS.B16] \
VMOV R1, P2.D[1] \
LDP P3_data<>(SB), (R0, R1) \
VMOV R0, P3.D[0] \
VMOV R1, P3.D[1] \
LDP mask_S0<>(SB), (R0, R1) \
VMOV R0, S0_MASK.D[0] \
VMOV R1, S0_MASK.D[1] \
LDP mask_S1<>(SB), (R0, R1) \
VMOV R0, S1_MASK.D[0] \
VMOV R1, S1_MASK.D[1] \
LDP Shuf_mask<>(SB), (R0, R1) \
VMOV R0, INVERSE_SHIFT_ROWS.D[0] \
VMOV R1, INVERSE_SHIFT_ROWS.D[1]
#define SHLDL(a, b, n) \ // NO SHLDL in GOLANG now #define SHLDL(a, b, n) \ // NO SHLDL in GOLANG now
LSLW n, a \ LSLW n, a \

25
zuc/eia_asm_arm64.s
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@ -47,21 +47,16 @@ GLOBL shuf_mask_dw2_0_dw3_0<>(SB), RODATA, $16
#define SHUF_MASK_DW2_DW3 V24 #define SHUF_MASK_DW2_DW3 V24
#define LOAD_GLOBAL_DATA() \ #define LOAD_GLOBAL_DATA() \
LDP bit_reverse_table_l<>(SB), (R0, R1) \ MOVD $bit_reverse_table_l<>(SB), R0 \
VMOV R0, BIT_REV_TAB_L.D[0] \ VLD1 (R0), [BIT_REV_TAB_L.B16] \
VMOV R1, BIT_REV_TAB_L.D[1] \ MOVD $bit_reverse_table_h<>(SB), R0 \
LDP bit_reverse_table_h<>(SB), (R0, R1) \ VLD1 (R0), [BIT_REV_TAB_H.B16] \
VMOV R0, BIT_REV_TAB_H.D[0] \ MOVD $bit_reverse_and_table<>(SB), R0 \
VMOV R1, BIT_REV_TAB_H.D[1] \ VLD1 (R0), [BIT_REV_AND_TAB.B16] \
LDP bit_reverse_and_table<>(SB), (R0, R1) \ MOVD $shuf_mask_dw0_0_dw1_0<>(SB), R0 \
VMOV R0, BIT_REV_AND_TAB.D[0] \ VLD1 (R0), [SHUF_MASK_DW0_DW1.B16] \
VMOV R1, BIT_REV_AND_TAB.D[1] \ MOVD $shuf_mask_dw2_0_dw3_0<>(SB), R0 \
LDP shuf_mask_dw0_0_dw1_0<>(SB), (R0, R1) \ VLD1 (R0), [SHUF_MASK_DW2_DW3.B16] \
VMOV R0, SHUF_MASK_DW0_DW1.D[0] \
VMOV R1, SHUF_MASK_DW0_DW1.D[1] \
LDP shuf_mask_dw2_0_dw3_0<>(SB), (R0, R1) \
VMOV R0, SHUF_MASK_DW2_DW3.D[0] \
VMOV R1, SHUF_MASK_DW2_DW3.D[1]
// func eia3Round16B(t *uint32, keyStream *uint32, p *byte, tagSize int) // func eia3Round16B(t *uint32, keyStream *uint32, p *byte, tagSize int)
TEXT ·eia3Round16B(SB),NOSPLIT,$0 TEXT ·eia3Round16B(SB),NOSPLIT,$0