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Update asm_arm64.s

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Sun Yimin 2021-12-31 15:05:28 +08:00 committed by GitHub
parent 10fe7937e7
commit 64ece7d8e1
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1 changed files with 2 additions and 4 deletions
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sm4/asm_arm64.s
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@ -66,10 +66,7 @@ GLOBL fk_mask<>(SB), RODATA, $16
; \ //############################# inner affine ############################// ; \ //############################# inner affine ############################//
LDP nibble_mask<>(SB), (R0, R1); \ LDP nibble_mask<>(SB), (R0, R1); \
VMOV R0, XTMP6.D[0]; \ VMOV R0, XTMP6.D[0]; \
VMOV R1, XTMP6.D[1]; \ VMOV R1, XTMP6.D[1]
VAND x.B16, XTMP6.B16, XTMP7.B16
#define SM4_TAO_L1(x, y) \ #define SM4_TAO_L1(x, y) \
SM4_SBOX(x, y); \ SM4_SBOX(x, y); \
@ -95,6 +92,7 @@ GLOBL fk_mask<>(SB), RODATA, $16
VEOR y.B16, x.B16, x.B16 VEOR y.B16, x.B16, x.B16
#define SM4_TAO_L2(x, y) \ #define SM4_TAO_L2(x, y) \
SM4_SBOX(x, y); \
; \ //#################### 4 parallel L2 linear transforms ##################// ; \ //#################### 4 parallel L2 linear transforms ##################//
VSHL $13, x.S4, XTMP6.S4; \ VSHL $13, x.S4, XTMP6.S4; \
VUSHR $19, x.S4, y.S4; \ VUSHR $19, x.S4, y.S4; \