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internal/deps/cpu: support Loong64 features detectiion
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@ -149,6 +149,18 @@ var ARM struct {
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_ CacheLinePad
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_ CacheLinePad
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}
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}
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// The booleans in Loong64 contain the correspondingly named cpu feature bit.
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// The struct is padded to avoid false sharing.
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var Loong64 struct {
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_ CacheLinePad
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HasLSX bool // support 128-bit vector extension
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HasLASX bool // support 256-bit vector extension
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HasCRC32 bool // support CRC instruction
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HasLAM_BH bool // support AM{SWAP/ADD}[_DB].{B/H} instruction
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HasLAMCAS bool // support AMCAS[_DB].{B/H/W/D} instruction
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_ CacheLinePad
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}
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// MIPS64X contains the supported CPU features of the current mips64/mips64le
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// MIPS64X contains the supported CPU features of the current mips64/mips64le
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// platforms. If the current platform is not mips64/mips64le or the current
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// platforms. If the current platform is not mips64/mips64le or the current
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// operating system is not Linux then all feature flags are false.
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// operating system is not Linux then all feature flags are false.
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22
internal/deps/cpu/cpu_linux_loong64.go
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22
internal/deps/cpu/cpu_linux_loong64.go
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@ -0,0 +1,22 @@
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// Copyright 2025 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package cpu
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// HWCAP bits. These are exposed by the Linux kernel.
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const (
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hwcap_LOONGARCH_LSX = 1 << 4
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hwcap_LOONGARCH_LASX = 1 << 5
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)
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func doinit() {
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// TODO: Features that require kernel support like LSX and LASX can
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// be detected here once needed in std library or by the compiler.
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Loong64.HasLSX = hwcIsSet(hwCap, hwcap_LOONGARCH_LSX)
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Loong64.HasLASX = hwcIsSet(hwCap, hwcap_LOONGARCH_LASX)
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}
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func hwcIsSet(hwc uint, val uint) bool {
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return hwc&val != 0
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}
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@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// license that can be found in the LICENSE file.
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//go:build linux && !arm && !arm64 && !mips64 && !mips64le && !ppc64 && !ppc64le && !s390x && !riscv64
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//go:build linux && !arm && !arm64 && !loong64 && !mips64 && !mips64le && !ppc64 && !ppc64le && !s390x && !riscv64
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package cpu
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package cpu
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@ -8,5 +8,43 @@ package cpu
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const cacheLineSize = 64
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const cacheLineSize = 64
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// Bit fields for CPUCFG registers, Related reference documents:
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// https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_cpucfg
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const (
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// CPUCFG1 bits
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cpucfg1_CRC32 = 1 << 25
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// CPUCFG2 bits
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cpucfg2_LAM_BH = 1 << 27
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cpucfg2_LAMCAS = 1 << 28
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)
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func initOptions() {
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func initOptions() {
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options = []option{
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{Name: "lsx", Feature: &Loong64.HasLSX},
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{Name: "lasx", Feature: &Loong64.HasLASX},
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{Name: "crc32", Feature: &Loong64.HasCRC32},
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{Name: "lam_bh", Feature: &Loong64.HasLAM_BH},
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{Name: "lamcas", Feature: &Loong64.HasLAMCAS},
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}
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// The CPUCFG data on Loong64 only reflects the hardware capabilities,
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// not the kernel support status, so features such as LSX and LASX that
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// require kernel support cannot be obtained from the CPUCFG data.
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//
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// These features only require hardware capability support and do not
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// require kernel specific support, so they can be obtained directly
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// through CPUCFG
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cfg1 := get_cpucfg(1)
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cfg2 := get_cpucfg(2)
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Loong64.HasCRC32 = cfgIsSet(cfg1, cpucfg1_CRC32)
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Loong64.HasLAMCAS = cfgIsSet(cfg2, cpucfg2_LAMCAS)
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Loong64.HasLAM_BH = cfgIsSet(cfg2, cpucfg2_LAM_BH)
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}
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func get_cpucfg(reg uint32) uint32
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func cfgIsSet(cfg uint32, val uint32) bool {
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return cfg&val != 0
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}
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}
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13
internal/deps/cpu/cpu_loong64.s
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13
internal/deps/cpu/cpu_loong64.s
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@ -0,0 +1,13 @@
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// Copyright 2025 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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#include "textflag.h"
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// func get_cpucfg(reg uint32) uint32
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TEXT ·get_cpucfg(SB), NOSPLIT|NOFRAME, $0
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MOVW reg+0(FP), R5
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// CPUCFG R5, R4 = 0x00006ca4
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WORD $0x00006ca4
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MOVW R4, ret+8(FP)
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RET
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