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sm4: code format

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Sun Yimin 2023-10-18 08:07:19 +08:00 committed by GitHub
parent 9bd64f94d3
commit 5243d0fe91
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 89 additions and 90 deletions
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8
sm4/aesni_macros_amd64.s
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@ -20,7 +20,7 @@ DATA inverse_shift_rows<>+0x10(SB)/8, $0x0B0E0104070A0D00
DATA inverse_shift_rows<>+0x18(SB)/8, $0x0306090C0F020508 DATA inverse_shift_rows<>+0x18(SB)/8, $0x0306090C0F020508
GLOBL inverse_shift_rows<>(SB), 8, $32 GLOBL inverse_shift_rows<>(SB), 8, $32
// Affine transform 1 (low and high hibbles) // Affine transform 1 (low and high nibbles)
DATA m1_low<>+0x00(SB)/8, $0x0A7FC3B6D5A01C69 DATA m1_low<>+0x00(SB)/8, $0x0A7FC3B6D5A01C69
DATA m1_low<>+0x08(SB)/8, $0x3045F98CEF9A2653 DATA m1_low<>+0x08(SB)/8, $0x3045F98CEF9A2653
DATA m1_low<>+0x10(SB)/8, $0x0A7FC3B6D5A01C69 DATA m1_low<>+0x10(SB)/8, $0x0A7FC3B6D5A01C69
@ -33,7 +33,7 @@ DATA m1_high<>+0x10(SB)/8, $0xC35BF46CAF379800
DATA m1_high<>+0x18(SB)/8, $0x68F05FC7049C33AB DATA m1_high<>+0x18(SB)/8, $0x68F05FC7049C33AB
GLOBL m1_high<>(SB), 8, $32 GLOBL m1_high<>(SB), 8, $32
// Affine transform 2 (low and high hibbles) // Affine transform 2 (low and high nibbles)
DATA m2_low<>+0x00(SB)/8, $0x9A950A05FEF16E61 DATA m2_low<>+0x00(SB)/8, $0x9A950A05FEF16E61
DATA m2_low<>+0x08(SB)/8, $0x0E019E916A65FAF5 DATA m2_low<>+0x08(SB)/8, $0x0E019E916A65FAF5
DATA m2_low<>+0x10(SB)/8, $0x9A950A05FEF16E61 DATA m2_low<>+0x10(SB)/8, $0x9A950A05FEF16E61
@ -408,7 +408,7 @@ GLOBL fk_mask<>(SB), 8, $16
// - t3: 128 bits register for data // - t3: 128 bits register for data
#define AVX_SM4_ROUND(index, RK, IND, x, y, tmp, t0, t1, t2, t3) \ #define AVX_SM4_ROUND(index, RK, IND, x, y, tmp, t0, t1, t2, t3) \
MOVL (index * 4)(RK)(IND*1), x; \ MOVL (index * 4)(RK)(IND*1), x; \
VPSHUFD $0, x, x; \ VPSHUFD $0, x, x; \ // Use VBROADCASTSS ?
VPXOR t1, x, x; \ VPXOR t1, x, x; \
VPXOR t2, x, x; \ VPXOR t2, x, x; \
VPXOR t3, x, x; \ VPXOR t3, x, x; \
@ -675,6 +675,8 @@ GLOBL fk_mask<>(SB), 8, $16
// - index: round key index immediate number // - index: round key index immediate number
// - x: 256 bits temp register, MUST use XDWORD! // - x: 256 bits temp register, MUST use XDWORD!
// - y: 256 bits temp register, MUST use YDWORD! // - y: 256 bits temp register, MUST use YDWORD!
// - tmp: 256 bits temp register
// - tmp1: 256 bits temp register
// - t0: 256 bits register for data as result // - t0: 256 bits register for data as result
// - t1: 256 bits register for data // - t1: 256 bits register for data
// - t2: 256 bits register for data // - t2: 256 bits register for data

9
sm4/cbc_amd64.s
View File

@ -11,7 +11,6 @@
#define t3 X5 #define t3 X5
#define XTMP6 X6 #define XTMP6 X6
#define IV X8
#include "aesni_macros_amd64.s" #include "aesni_macros_amd64.s"
@ -27,15 +26,14 @@ TEXT ·encryptBlocksChain(SB),NOSPLIT,$0
MOVQ src_len+40(FP), ptxLen MOVQ src_len+40(FP), ptxLen
MOVQ iv+56(FP), SI MOVQ iv+56(FP), SI
MOVUPS (SI), IV MOVOU (SI), t0
loopSrc: loopSrc:
CMPQ ptxLen, $16 CMPQ ptxLen, $16
JB done_sm4 JB done_sm4
SUBQ $16, ptxLen SUBQ $16, ptxLen
MOVOU (ptx), t0 PXOR (ptx), t0
PXOR IV, t0
PSHUFB flip_mask<>(SB), t0 PSHUFB flip_mask<>(SB), t0
PSHUFD $1, t0, t1 PSHUFD $1, t0, t1
@ -60,7 +58,6 @@ loopRound:
PALIGNR $4, t1, t0 PALIGNR $4, t1, t0
PSHUFB flip_mask<>(SB), t0 PSHUFB flip_mask<>(SB), t0
MOVOU t0, IV
MOVOU t0, (ctx) MOVOU t0, (ctx)
LEAQ 16(ptx), ptx LEAQ 16(ptx), ptx
@ -69,7 +66,7 @@ loopRound:
JMP loopSrc JMP loopSrc
done_sm4: done_sm4:
MOVUPS IV, (SI) MOVOU t0, (SI)
RET RET
#undef ctx #undef ctx