2022-11-22 11:02:37 +08:00
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//go:build amd64 && !purego
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// +build amd64,!purego
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2022-07-21 17:32:11 +08:00
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#include "textflag.h"
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#define x X0
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#define y X1
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#define t0 X2
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#define t1 X3
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#define t2 X4
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#define t3 X5
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#define XTMP6 X6
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#define IV X8
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2023-06-28 16:52:40 +08:00
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#include "aesni_macros_amd64.s"
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2022-07-21 17:32:11 +08:00
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// func encryptBlocksChain(xk *uint32, dst, src []byte, iv *byte)
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TEXT ·encryptBlocksChain(SB),NOSPLIT,$0
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#define ctx BX
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#define ptx DX
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#define ptxLen DI
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MOVQ xk+0(FP), AX
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MOVQ dst+8(FP), ctx
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MOVQ src+32(FP), ptx
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MOVQ src_len+40(FP), ptxLen
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MOVQ iv+56(FP), SI
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MOVUPS (SI), IV
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loopSrc:
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2022-07-22 10:08:15 +08:00
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CMPQ ptxLen, $16
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JB done_sm4
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SUBQ $16, ptxLen
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2022-07-21 17:32:11 +08:00
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2023-06-19 15:51:49 +08:00
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MOVOU (ptx), t0
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2022-07-22 10:08:15 +08:00
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PXOR IV, t0
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2022-07-21 17:32:11 +08:00
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2022-07-22 10:08:15 +08:00
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PSHUFB flip_mask<>(SB), t0
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PSHUFD $1, t0, t1
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PSHUFD $2, t0, t2
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PSHUFD $3, t0, t3
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2022-07-21 17:32:11 +08:00
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2022-07-22 10:08:15 +08:00
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XORL CX, CX
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2022-07-21 17:32:11 +08:00
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loopRound:
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2022-07-22 10:08:15 +08:00
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SM4_SINGLE_ROUND(0, AX, CX, x, y, XTMP6, t0, t1, t2, t3)
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SM4_SINGLE_ROUND(1, AX, CX, x, y, XTMP6, t1, t2, t3, t0)
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SM4_SINGLE_ROUND(2, AX, CX, x, y, XTMP6, t2, t3, t0, t1)
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SM4_SINGLE_ROUND(3, AX, CX, x, y, XTMP6, t3, t0, t1, t2)
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ADDL $16, CX
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CMPL CX, $4*32
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JB loopRound
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2023-06-19 15:51:49 +08:00
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PALIGNR $4, t3, t3
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PALIGNR $4, t3, t2
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PALIGNR $4, t2, t1
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PALIGNR $4, t1, t0
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PSHUFB flip_mask<>(SB), t0
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2022-07-22 10:08:15 +08:00
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2023-06-19 15:51:49 +08:00
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MOVOU t0, IV
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MOVOU t0, (ctx)
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2022-07-22 10:08:15 +08:00
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LEAQ 16(ptx), ptx
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LEAQ 16(ctx), ctx
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2022-07-21 17:32:11 +08:00
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2022-07-22 10:08:15 +08:00
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JMP loopSrc
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2022-07-21 17:32:11 +08:00
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done_sm4:
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MOVUPS IV, (SI)
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RET
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#undef ctx
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#undef ptx
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#undef ptxLen
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2023-06-19 15:51:49 +08:00
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#define XDWTMP0 Y0
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#define XDWTMP1 Y1
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#define XDWTMP2 Y2
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#define XDWORD0 Y4
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#define XDWORD1 Y5
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#define XDWORD2 Y6
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#define XDWORD3 Y7
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2023-08-03 15:17:01 +08:00
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#define XDWORD4 Y10
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#define XDWORD5 Y11
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#define XDWORD6 Y12
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#define XDWORD7 Y14
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2023-07-03 12:00:27 +08:00
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#define XWTMP0 X0
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#define XWTMP1 X1
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#define XWTMP2 X2
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#define XWORD0 X4
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#define XWORD1 X5
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#define XWORD2 X6
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#define XWORD3 X7
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2023-08-03 15:17:01 +08:00
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#define XWORD4 X10
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#define XWORD5 X11
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#define XWORD6 X12
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#define XWORD7 X14
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2023-06-19 15:51:49 +08:00
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#define NIBBLE_MASK Y3
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#define X_NIBBLE_MASK X3
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2023-07-03 12:00:27 +08:00
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2023-06-19 15:51:49 +08:00
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#define BYTE_FLIP_MASK Y13 // mask to convert LE -> BE
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2023-07-03 12:00:27 +08:00
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#define X_BYTE_FLIP_MASK X13 // mask to convert LE -> BE
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2023-06-19 15:51:49 +08:00
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#define XDWORD Y8
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#define YDWORD Y9
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#define XWORD X8
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#define YWORD X9
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// func decryptBlocksChain(xk *uint32, dst, src []byte, iv *byte)
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TEXT ·decryptBlocksChain(SB),NOSPLIT,$0
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MOVQ xk+0(FP), AX
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MOVQ dst+8(FP), BX
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MOVQ src+32(FP), DX
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2023-08-03 15:17:01 +08:00
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MOVQ src_len+40(FP), DI
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2023-06-19 15:51:49 +08:00
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MOVQ iv+56(FP), SI
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CMPB ·useAVX2(SB), $1
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JE avx2
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2023-07-03 12:00:27 +08:00
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CMPB ·useAVX(SB), $1
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JE avx
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2023-06-19 15:51:49 +08:00
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non_avx2_start:
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2023-08-03 15:17:01 +08:00
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CMPQ DI, $128
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JEQ sse_8blocks
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MOVOU 0(DX), XWORD0
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MOVOU 16(DX), XWORD1
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MOVOU 32(DX), XWORD2
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MOVOU 48(DX), XWORD3
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SM4_4BLOCKS(AX, XWORD, YWORD, XWTMP0, XWTMP1, XWORD0, XWORD1, XWORD2, XWORD3)
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PXOR 0(SI), XWORD0
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PXOR 16(SI), XWORD1
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PXOR 32(SI), XWORD2
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PXOR 48(SI), XWORD3
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MOVUPS XWORD0, 0(BX)
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MOVUPS XWORD1, 16(BX)
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MOVUPS XWORD2, 32(BX)
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MOVUPS XWORD3, 48(BX)
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RET
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sse_8blocks:
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MOVOU 0(DX), XWORD0
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MOVOU 16(DX), XWORD1
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MOVOU 32(DX), XWORD2
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MOVOU 48(DX), XWORD3
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MOVOU 64(DX), XWORD4
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MOVOU 80(DX), XWORD5
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MOVOU 96(DX), XWORD6
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MOVOU 112(DX), XWORD7
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SM4_8BLOCKS(AX, XWORD, YWORD, XWTMP0, XWTMP1, XWORD0, XWORD1, XWORD2, XWORD3, XWORD4, XWORD5, XWORD6, XWORD7)
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PXOR 0(SI), XWORD0
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PXOR 16(SI), XWORD1
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PXOR 32(SI), XWORD2
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PXOR 48(SI), XWORD3
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PXOR 64(SI), XWORD4
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PXOR 80(SI), XWORD5
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PXOR 96(SI), XWORD6
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PXOR 112(SI), XWORD7
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MOVOU XWORD0, 0(BX)
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MOVOU XWORD1, 16(BX)
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MOVOU XWORD2, 32(BX)
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MOVOU XWORD3, 48(BX)
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MOVOU XWORD4, 64(BX)
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MOVOU XWORD5, 80(BX)
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MOVOU XWORD6, 96(BX)
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MOVOU XWORD7, 112(BX)
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2023-06-19 15:51:49 +08:00
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done_sm4:
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RET
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2023-07-03 12:00:27 +08:00
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avx:
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2023-08-03 15:17:01 +08:00
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CMPQ DI, $128
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JEQ avx_8blocks
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2023-07-03 12:00:27 +08:00
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VMOVDQU 0(DX), XWORD0
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VMOVDQU 16(DX), XWORD1
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VMOVDQU 32(DX), XWORD2
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VMOVDQU 48(DX), XWORD3
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2023-08-03 15:17:01 +08:00
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AVX_SM4_4BLOCKS(AX, XWORD, YWORD, XWTMP0, XWTMP1, XWORD0, XWORD1, XWORD2, XWORD3)
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2023-07-03 12:00:27 +08:00
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2023-08-03 15:17:01 +08:00
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VPXOR 0(SI), XWORD0, XWORD0
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VPXOR 16(SI), XWORD1, XWORD1
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VPXOR 32(SI), XWORD2, XWORD2
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VPXOR 48(SI), XWORD3, XWORD3
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2023-07-03 12:00:27 +08:00
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2023-08-03 15:17:01 +08:00
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VMOVDQU XWORD0, 0(BX)
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VMOVDQU XWORD1, 16(BX)
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VMOVDQU XWORD2, 32(BX)
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VMOVDQU XWORD3, 48(BX)
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RET
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2023-07-03 12:00:27 +08:00
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2023-08-03 15:17:01 +08:00
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avx_8blocks:
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VMOVDQU 0(DX), XWORD0
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VMOVDQU 16(DX), XWORD1
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VMOVDQU 32(DX), XWORD2
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VMOVDQU 48(DX), XWORD3
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VMOVDQU 64(DX), XWORD4
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VMOVDQU 80(DX), XWORD5
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VMOVDQU 96(DX), XWORD6
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VMOVDQU 112(DX), XWORD7
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2023-07-03 12:00:27 +08:00
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2023-08-03 15:17:01 +08:00
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AVX_SM4_8BLOCKS(AX, XWORD, YWORD, XWTMP0, XWTMP1, XWORD0, XWORD1, XWORD2, XWORD3, XWORD4, XWORD5, XWORD6, XWORD7)
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2023-07-03 12:00:27 +08:00
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VPXOR 0(SI), XWORD0, XWORD0
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VPXOR 16(SI), XWORD1, XWORD1
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VPXOR 32(SI), XWORD2, XWORD2
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VPXOR 48(SI), XWORD3, XWORD3
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2023-08-03 15:17:01 +08:00
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VPXOR 64(SI), XWORD4, XWORD4
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VPXOR 80(SI), XWORD5, XWORD5
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VPXOR 96(SI), XWORD6, XWORD6
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VPXOR 112(SI), XWORD7, XWORD7
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2023-07-03 12:00:27 +08:00
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VMOVDQU XWORD0, 0(BX)
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VMOVDQU XWORD1, 16(BX)
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VMOVDQU XWORD2, 32(BX)
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VMOVDQU XWORD3, 48(BX)
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2023-08-03 15:17:01 +08:00
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VMOVDQU XWORD4, 64(BX)
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VMOVDQU XWORD5, 80(BX)
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VMOVDQU XWORD6, 96(BX)
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VMOVDQU XWORD7, 112(BX)
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2023-07-03 12:00:27 +08:00
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2023-08-03 15:17:01 +08:00
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avx_sm4_done:
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2023-07-03 12:00:27 +08:00
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RET
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2023-06-19 15:51:49 +08:00
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avx2:
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VBROADCASTI128 nibble_mask<>(SB), NIBBLE_MASK
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2023-08-03 15:17:01 +08:00
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CMPQ DI, $256
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JEQ avx2_16blocks
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2023-06-19 15:51:49 +08:00
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avx2_8blocks:
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VMOVDQU 0(DX), XDWORD0
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VMOVDQU 32(DX), XDWORD1
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VMOVDQU 64(DX), XDWORD2
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VMOVDQU 96(DX), XDWORD3
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VBROADCASTI128 flip_mask<>(SB), BYTE_FLIP_MASK
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// Apply Byte Flip Mask: LE -> BE
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VPSHUFB BYTE_FLIP_MASK, XDWORD0, XDWORD0
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VPSHUFB BYTE_FLIP_MASK, XDWORD1, XDWORD1
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VPSHUFB BYTE_FLIP_MASK, XDWORD2, XDWORD2
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VPSHUFB BYTE_FLIP_MASK, XDWORD3, XDWORD3
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// Transpose matrix 4 x 4 32bits word
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TRANSPOSE_MATRIX(XDWORD0, XDWORD1, XDWORD2, XDWORD3, XDWTMP1, XDWTMP2)
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2023-08-03 15:17:01 +08:00
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AVX2_SM4_8BLOCKS(AX, XDWORD, YDWORD, XWORD, YWORD, XDWTMP0, XDWORD0, XDWORD1, XDWORD2, XDWORD3)
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2023-06-19 15:51:49 +08:00
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2023-08-03 15:17:01 +08:00
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// Transpose matrix 4 x 4 32bits word
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TRANSPOSE_MATRIX(XDWORD0, XDWORD1, XDWORD2, XDWORD3, XDWTMP1, XDWTMP2)
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2023-06-19 15:51:49 +08:00
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2023-08-03 15:17:01 +08:00
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VBROADCASTI128 bswap_mask<>(SB), BYTE_FLIP_MASK
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VPSHUFB BYTE_FLIP_MASK, XDWORD0, XDWORD0
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VPSHUFB BYTE_FLIP_MASK, XDWORD1, XDWORD1
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VPSHUFB BYTE_FLIP_MASK, XDWORD2, XDWORD2
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VPSHUFB BYTE_FLIP_MASK, XDWORD3, XDWORD3
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VPXOR 0(SI), XDWORD0, XDWORD0
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VPXOR 32(SI), XDWORD1, XDWORD1
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VPXOR 64(SI), XDWORD2, XDWORD2
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VPXOR 96(SI), XDWORD3, XDWORD3
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VMOVDQU XDWORD0, 0(BX)
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VMOVDQU XDWORD1, 32(BX)
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VMOVDQU XDWORD2, 64(BX)
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VMOVDQU XDWORD3, 96(BX)
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VZEROUPPER
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RET
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avx2_16blocks:
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VMOVDQU 0(DX), XDWORD0
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VMOVDQU 32(DX), XDWORD1
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VMOVDQU 64(DX), XDWORD2
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VMOVDQU 96(DX), XDWORD3
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VMOVDQU 128(DX), XDWORD4
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VMOVDQU 160(DX), XDWORD5
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VMOVDQU 192(DX), XDWORD6
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VMOVDQU 224(DX), XDWORD7
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VBROADCASTI128 flip_mask<>(SB), BYTE_FLIP_MASK
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// Apply Byte Flip Mask: LE -> BE
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VPSHUFB BYTE_FLIP_MASK, XDWORD0, XDWORD0
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VPSHUFB BYTE_FLIP_MASK, XDWORD1, XDWORD1
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VPSHUFB BYTE_FLIP_MASK, XDWORD2, XDWORD2
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VPSHUFB BYTE_FLIP_MASK, XDWORD3, XDWORD3
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VPSHUFB BYTE_FLIP_MASK, XDWORD4, XDWORD4
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VPSHUFB BYTE_FLIP_MASK, XDWORD5, XDWORD5
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VPSHUFB BYTE_FLIP_MASK, XDWORD6, XDWORD6
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VPSHUFB BYTE_FLIP_MASK, XDWORD7, XDWORD7
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// Transpose matrix 4 x 4 32bits word
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TRANSPOSE_MATRIX(XDWORD0, XDWORD1, XDWORD2, XDWORD3, XDWTMP1, XDWTMP2)
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TRANSPOSE_MATRIX(XDWORD4, XDWORD5, XDWORD6, XDWORD7, XDWTMP1, XDWTMP2)
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AVX2_SM4_16BLOCKS(AX, XDWORD, YDWORD, XWORD, YWORD, XDWTMP0, XDWTMP1, XDWORD0, XDWORD1, XDWORD2, XDWORD3, XDWORD4, XDWORD5, XDWORD6, XDWORD7)
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2023-06-19 15:51:49 +08:00
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// Transpose matrix 4 x 4 32bits word
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TRANSPOSE_MATRIX(XDWORD0, XDWORD1, XDWORD2, XDWORD3, XDWTMP1, XDWTMP2)
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2023-08-03 15:17:01 +08:00
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TRANSPOSE_MATRIX(XDWORD4, XDWORD5, XDWORD6, XDWORD7, XDWTMP1, XDWTMP2)
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2023-06-19 15:51:49 +08:00
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VBROADCASTI128 bswap_mask<>(SB), BYTE_FLIP_MASK
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VPSHUFB BYTE_FLIP_MASK, XDWORD0, XDWORD0
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VPSHUFB BYTE_FLIP_MASK, XDWORD1, XDWORD1
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VPSHUFB BYTE_FLIP_MASK, XDWORD2, XDWORD2
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VPSHUFB BYTE_FLIP_MASK, XDWORD3, XDWORD3
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2023-08-03 15:17:01 +08:00
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VPSHUFB BYTE_FLIP_MASK, XDWORD4, XDWORD4
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VPSHUFB BYTE_FLIP_MASK, XDWORD5, XDWORD5
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VPSHUFB BYTE_FLIP_MASK, XDWORD6, XDWORD6
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VPSHUFB BYTE_FLIP_MASK, XDWORD7, XDWORD7
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2023-06-19 15:51:49 +08:00
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VPXOR 0(SI), XDWORD0, XDWORD0
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VPXOR 32(SI), XDWORD1, XDWORD1
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VPXOR 64(SI), XDWORD2, XDWORD2
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VPXOR 96(SI), XDWORD3, XDWORD3
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2023-08-03 15:17:01 +08:00
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VPXOR 128(SI), XDWORD4, XDWORD4
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VPXOR 160(SI), XDWORD5, XDWORD5
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VPXOR 192(SI), XDWORD6, XDWORD6
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VPXOR 224(SI), XDWORD7, XDWORD7
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2023-06-19 15:51:49 +08:00
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VMOVDQU XDWORD0, 0(BX)
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VMOVDQU XDWORD1, 32(BX)
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VMOVDQU XDWORD2, 64(BX)
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VMOVDQU XDWORD3, 96(BX)
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2023-08-03 15:17:01 +08:00
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VMOVDQU XDWORD4, 128(BX)
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VMOVDQU XDWORD5, 160(BX)
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VMOVDQU XDWORD6, 192(BX)
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VMOVDQU XDWORD7, 224(BX)
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2023-06-19 15:51:49 +08:00
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avx2_sm4_done:
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VZEROUPPER
|
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RET
|
