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155 lines
4.2 KiB
C
155 lines
4.2 KiB
C
8 years ago
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/* Copyright (C) 1997-2016 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _FENV_H
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# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
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#endif
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/* Define bits representing the exception. We use the bit positions
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of the appropriate bits in the FPU control word. */
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enum
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{
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FE_INVALID =
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#define FE_INVALID 0x01
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FE_INVALID,
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__FE_DENORM = 0x02,
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FE_DIVBYZERO =
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#define FE_DIVBYZERO 0x04
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FE_DIVBYZERO,
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FE_OVERFLOW =
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#define FE_OVERFLOW 0x08
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FE_OVERFLOW,
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FE_UNDERFLOW =
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#define FE_UNDERFLOW 0x10
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FE_UNDERFLOW,
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FE_INEXACT =
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#define FE_INEXACT 0x20
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FE_INEXACT
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};
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#define FE_ALL_EXCEPT \
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(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
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/* The ix87 FPU supports all of the four defined rounding modes. We
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use again the bit positions in the FPU control word as the values
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for the appropriate macros. */
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enum
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{
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FE_TONEAREST =
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#define FE_TONEAREST 0
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FE_TONEAREST,
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FE_DOWNWARD =
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#define FE_DOWNWARD 0x400
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FE_DOWNWARD,
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FE_UPWARD =
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#define FE_UPWARD 0x800
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FE_UPWARD,
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FE_TOWARDZERO =
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#define FE_TOWARDZERO 0xc00
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FE_TOWARDZERO
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};
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/* Type representing exception flags. */
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typedef unsigned short int fexcept_t;
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/* Type representing floating-point environment. This structure
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corresponds to the layout of the block written by the `fstenv'
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instruction and has additional fields for the contents of the MXCSR
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register as written by the `stmxcsr' instruction. */
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typedef struct
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{
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unsigned short int __control_word;
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unsigned short int __glibc_reserved1;
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unsigned short int __status_word;
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unsigned short int __glibc_reserved2;
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unsigned short int __tags;
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unsigned short int __glibc_reserved3;
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unsigned int __eip;
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unsigned short int __cs_selector;
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unsigned int __opcode:11;
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unsigned int __glibc_reserved4:5;
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unsigned int __data_offset;
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unsigned short int __data_selector;
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unsigned short int __glibc_reserved5;
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#ifdef __x86_64__
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unsigned int __mxcsr;
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#endif
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}
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fenv_t;
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/* If the default argument is used we use this value. */
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#define FE_DFL_ENV ((const fenv_t *) -1)
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#ifdef __USE_GNU
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/* Floating-point environment where none of the exception is masked. */
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# define FE_NOMASK_ENV ((const fenv_t *) -2)
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#endif
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#ifdef __USE_EXTERN_INLINES
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__BEGIN_DECLS
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/* Optimized versions. */
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extern int __REDIRECT_NTH (__feraiseexcept_renamed, (int), feraiseexcept);
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__extern_always_inline void
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__NTH (__feraiseexcept_invalid_divbyzero (int __excepts))
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{
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if ((FE_INVALID & __excepts) != 0)
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{
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/* One example of an invalid operation is 0.0 / 0.0. */
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float __f = 0.0;
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# ifdef __SSE_MATH__
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__asm__ __volatile__ ("divss %0, %0 " : : "x" (__f));
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# else
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__asm__ __volatile__ ("fdiv %%st, %%st(0); fwait"
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: "=t" (__f) : "0" (__f));
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# endif
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(void) &__f;
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}
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if ((FE_DIVBYZERO & __excepts) != 0)
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{
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float __f = 1.0;
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float __g = 0.0;
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# ifdef __SSE_MATH__
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__asm__ __volatile__ ("divss %1, %0" : : "x" (__f), "x" (__g));
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# else
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__asm__ __volatile__ ("fdivp %%st, %%st(1); fwait"
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: "=t" (__f) : "0" (__f), "u" (__g) : "st(1)");
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# endif
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(void) &__f;
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}
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}
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__extern_inline int
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__NTH (feraiseexcept (int __excepts))
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{
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if (__builtin_constant_p (__excepts)
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&& (__excepts & ~(FE_INVALID | FE_DIVBYZERO)) == 0)
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{
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__feraiseexcept_invalid_divbyzero (__excepts);
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return 0;
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}
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return __feraiseexcept_renamed (__excepts);
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}
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__END_DECLS
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#endif
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